SH7041A datasheet(35/923 Pages) RENESAS

35 / 923 page

xiii

Section 21 128kB PROM................................................................................................... 669

21.1

Overview............................................................................................................................ 669

21.2

PROM Mode...................................................................................................................... 670

21.2.1 PROM Mode Settings........................................................................................... 670

21.2.2 Socket Adapter Pin Correspondence and Memory Map ...................................... 670

21.3

PROM Programming ......................................................................................................... 674

21.3.1 Programming Mode Selection .............................................................................. 674

21.3.2 Write/Verify and Electrical Characteristics.......................................................... 675

21.3.3 Cautions on Writing ............................................................................................. 679

21.3.4 Post-Write Reliability ........................................................................................... 680

Section 22 256kB Flash Memory (F-ZTAT) ............................................................... 681

22.1

Features .............................................................................................................................. 681

22.2

Overview............................................................................................................................ 682

22.2.1 Block Diagram...................................................................................................... 682

22.2.2 Mode Transition Diagram..................................................................................... 683

22.2.3 Onboard Program Mode ....................................................................................... 684

22.2.4 Flash Memory Emulation in RAM....................................................................... 686

22.2.5 Differences between Boot Mode and User Program Mode.................................. 687

22.2.6 Block Configuration ............................................................................................. 688

22.3

Pin Configuration............................................................................................................... 689

22.4

Register Configuration....................................................................................................... 689

22.5

Description of Registers..................................................................................................... 690

22.5.1 Flash Memory Control Register 1 (FLMCR1) ..................................................... 690

22.5.2 Flash Memory Control Register 2 (FLMCR2) ..................................................... 692

22.5.3 Erase Block Register 1 (EBR1) ............................................................................ 695

22.5.4 Erase Block Register 2 (EBR2) ............................................................................ 695

22.5.5 RAM Emulation Register (RAMER) ................................................................... 696

22.6

On-Board Programming Mode .......................................................................................... 698

22.6.1 Boot Mode ............................................................................................................ 699

22.6.2 User Program Mode ............................................................................................. 703

22.7

Programming/Erasing Flash Memory................................................................................ 704

22.7.1 Program Mode (n = 1 for Addresses H'0000–H'1FFFF,

n = 2 for Addresses H'20000–H'3FFFF)............................................................... 704

22.7.2 Program-Verify Mode (n = 1 for Addresses H'0000–H'1FFFF,

n = 2 for Addresses H'20000–H'3FFFF)............................................................... 705

22.7.3 Erase Mode (n = 1 for Addresses H'0000–H'1FFFF,

n = 2 for Addresses H'20000–H'3FFFF)............................................................... 711

22.7.4 Erase-Verify Mode (n = 1 for Addresses H'00000–H'1FFFF,

n = 2 for Addresses H'20000–H'3FFFF)............................................................... 712

22.8

Protection........................................................................................................................... 718

22.8.1 Hardware Protection ............................................................................................. 718

22.8.2 Software Protection .............................................................................................. 719

SH7041A 数据表(PDF) 35 Page - Renesas Technology Corp

SH7041A 数据表(HTML) 35 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载