SH7041A datasheet(97/923 Pages) RENESAS

部件名	SH7041A

功能描述	Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

PDF	923 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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97 / 923 page

2.4

Instruction Set by Classification

Table 2.10

Classification of Instructions

Classification Types

Operation

Code

Function

No. of

Instructions

Data transfer

MOV

Data transfer, immediate data transfer,

peripheral module data transfer, structure data

transfer

MOVA

Effective address transfer

MOVT

T bit transfer

SWAP

Swap of upper and lower bytes

XTRCT

Extraction of the middle of registers connected

Arithmetic

ADD

Binary addition

operations

ADDCBinary addition with carry

ADDV

Binary addition with overflow check

CMP/cond Comparison

DIV1

Division

DIV0S

Initialization of signed division

DIV0U

Initialization of unsigned division

DMULS

Signed double-length multiplication

DMULU

Unsigned double-length multiplication

Decrement and test

EXTS

Sign extension

EXTU

Zero extension

MACMultiply/accumulate, double-length

multiply/accumulate operation

MUL

Double-length multiply operation

MULS

Signed multiplication

MULU

Unsigned multiplication

NEG

Negation

NEGCNegation with borrow

SUB

Binary subtraction

SUBCBinary subtraction with borrow

SUBV

Binary subtraction with underflow

SH7041A 数据表(PDF) 97 Page - Renesas Technology Corp

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