SH7041A datasheet(85/923 Pages) RENESAS

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2.1.3

System Registers

System registers consist of four 32-bit registers: high and low multiply and accumulate registers

(MACH and MACL), the procedure register (PR), and the program counter (PC). The multiply

and accumulate registers store the results of multiply and accumulate operations. The procedure

program addresses to control the flow of the processing. Figure 2.3 shows a system register.

MACL

MACH

Multiply and accumulate (MAC)

registers high and low (MACH,

MACL): Stores the results of

multiply and accumulate operations.

Procedure register (PR): Stores

a return address from a

subroutine procedure.

Program counter (PC): Indicates

the fourth byte (second instruction)

after the current instruction.

Figure 2.3 System Registers

2.1.4

Initial Values of Registers

Table 2.1 lists the values of the registers after reset.

Table 2.1

Initial Values of Registers

Classification

Initial Value

General registers

R0–R14

Undefined

R15 (SP)

Value of the stack pointer in the vector address table

Control registers

Bits I3–I0 are 1111 (H'F), reserved bits are 0, and other

bits are undefined

GBR

Undefined

VBR

H'00000000

System registers

MACH, MACL, PR

Undefined

PCValue of the program counter in the vector address table

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