SH7041A datasheet(138/923 Pages) RENESAS

部件名	SH7041A

功能描述	Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

PDF	923 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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138 / 923 page

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CPU

Interrupt

request

Com-

parator

CPU/

DTC

request

judg-

ment

Priority

ranking

judg-

ment

Input

control

(Interrupt request)

ISR

ICR

IPR

DTER

DTC

IPRA–IPRH

Module bus

Bus

interface

I3 I2 I1 I0

INTC

IRQOUT

NMI

IRQ0

IRQ1

IRQ2

IRQ3

IRQ4

IRQ5

IRQ6

IRQ7

UBC

DMAC

MTU

CMT

SCI

A/D

DTC

(Interrupt request)

WDT

BSC

I/O

UBC:

DMAC:

MTU:

CMT:

SCI:

A/D:

DTC:

WDT:

BSC:

User break controller

Direct memory access controller

Multifunction timer pulse unit

Compare match timer

Serial communication interface

A/D converter

Data transfer controller

Watchdog timer

Bus state controller (DRAM

refresh control section)

I/O:

ICR:

ISR:

DTER:

IPRA–IPRH:

SR:

I/O port (port output control section)

Interrupt control register

IRQ ststus register

DTC enable register

Interrupt priority level setting

registers A to H

Status register

Figure 6.1 INTC Block Diagram

SH7041A 数据表(PDF) 138 Page - Renesas Technology Corp

SH7041A 数据表(HTML) 138 Page - Renesas Technology Corp

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