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SH7041A 数据表(PDF) 158 Page - Renesas Technology Corp |
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SH7041A 数据表(HTML) 158 Page - Renesas Technology Corp |
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158 / 923 page ![]() 120 Bus interface Break condition comparator Module bus UBBR UBAMRH UBARH UBAMRL UBARL Interrupt request Interrupt controller User break interrupt generating circuit UBC UBARH, UBARL: UBAMRH, UBAMRL: UBBR: User break address registers H, L User break address mask registers H, L User break bus cycle register Figure 7.1 User Break Controller Block Diagram 7.1.3 Register Configuration The UBC has the five registers shown in table 7.1. Break conditions are established using these registers. |
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