MPC8343ECVRADDB datasheet(17/80 Pages) NXP

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MPC8343EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 11

Freescale Semiconductor

DDR and DDR2 SDRAM

Table 16 provides the current draw characteristics for MVREF.

6.2

DDR and DDR2 SDRAM AC Electrical Characteristics

This section provides the AC electrical characteristics for the DDR and DDR2 SDRAM interface.

6.2.1

DDR and DDR2 SDRAM Input AC Timing Specifications

Table 17 provides the input AC timing specifications for the DDR2 SDRAM when GVDD(typ) = 1.8 V.

Table 18 provides the input AC timing specifications for the DDR SDRAM when GVDD(typ) = 2.5 V.

Table 19 provides the input AC timing specifications for the DDR SDRAM interface.

Table 16. Current Draw Characteristics for MVREF

Parameter/Condition

Symbol

Min

Max

Unit

Note

Current draw for MVREF

IMVREF

—500

μA1

Note:

1. The voltage regulator for MVREF must supply up to 500 μA current.

Table 17. DDR2 SDRAM Input AC Timing Specifications for 1.8-V Interface

At recommended operating conditions with GVDD of 1.8 ± 5%.

Parameter

Symbol

Min

Max

Unit

Notes

AC input low voltage

VIL

—MVREF – 0.25

—

AC input high voltage

VIH

MVREF + 0.25

—

Table 18. DDR SDRAM Input AC Timing Specifications for 2.5-V Interface

At recommended operating conditions with GVDD of 2.5 ± 5%.

Parameter

Symbol

Min

Max

Unit

Notes

AC input low voltage

VIL

—MVREF – 0.31

—

AC input high voltage

VIH

MVREF + 0.31

—

Table 19. DDR and DDR2 SDRAM Input AC Timing Specifications

At recommended operating conditions with GVDD of (1.8 or 2.5 V) ± 5%.

Parameter

Symbol

Min

Max

Unit

Notes

Controller Skew for MDQS—MDQ/MECC/MDM

tCISKEW

1, 2

400 MHz

–600

600

333 MHz

–750

750

—

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