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MPC8343ECVRADDB 数据表(PDF) 8 Page - NXP Semiconductors |
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MPC8343ECVRADDB 数据表(HTML) 8 Page - NXP Semiconductors |
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8 / 80 page  MPC8343EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 11 8 Freescale Semiconductor Electrical Characteristics Figure 2 shows the undershoot and overshoot voltages at the interfaces of the MPC8343EA. Figure 2. Overshoot/Undershoot Voltage for GVDD/OVDD/LVDD PCI, local bus, DUART, system control and power management, I2C, and JTAG I/O voltage OVDD 3.3 V ± 330 mV V — Note: 1 GV DD, LVDD, OVDD, AVDD, and VDD must track each other and must vary in the same direction—either in the positive or negative direction. Table 2. Recommended Operating Conditions (continued) Parameter Symbol Recommended Value Unit Notes GND GND – 0.3 V GND – 0.7 V Not to Exceed 10% G/L/OVDD + 20% G/L/OVDD G/L/OVDD + 5% of tinterface 1 1. tinterface refers to the clock period associated with the bus clock interface. VIH VIL Note: |
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