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ADP5003ACPZ-R7 数据表(PDF) 28 Page - Analog Devices

部件名 ADP5003ACPZ-R7
功能描述  Low Noise Micro PMU, 3 A Buck Regulator with 3 A LDO
PDF  31 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP5003ACPZ-R7 数据表(HTML) 28 Page - Analog Devices

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ADP5003
Data Sheet
Rev. A | Page 28 of 31
BUCK CONFIGURATIONS
INDEPENDENT
The buck and LDO regulators can operate independently of
each other (see Figure 50) to provide two voltage rails from a
single supply. In this way, the buck regulator can provide an
intermediate supply rail for the LDO regulator with a fixed
headroom voltage between the buck output voltage and the
LDO output voltage. The LDO regulator acts to filter the voltage
ripple and switching noise generated by the buck regulator for
noise sensitive supplies. Where additional filtering is required, a
second stage LC filter can be added between the buck output
and the LDO input. Because the regulators are independently
operated to provide a single voltage rail, the PSRR and efficiency
can be configured as required by the application by either
setting a lower headroom voltage for greater efficiency or a
higher headroom voltage for greater PSRR.
0
10
20
30
40
50
60
70
80
0
0.5
1.0
1.5
2.0
2.5
3.0
LOAD CURRENT (A)
ADAPTIVE HEADROOM CONTROL
INDEPENDENT, 150mV HEADROOM
INDEPENDENT, 500mV HEADROOM
Figure 49. Efficiency vs. Load Current for
Different Operating Modes
ANALOG DEVICES
RF TRANSCEIVER,
HIGH SPEED
ADC/DAC, CLOCK,
ASIC/PROCESSOR
RRT
294kΩ
RT
RBOT2
64.9kΩ
RTOP2
100kΩ
VOUT1
SW1
PGND1
VREG
PVINSYS
VPVINSYS: 12V
AGND1
AGND2
PVIN2
PVOUT2
VFB2P
EN1
VBUF
COMP1
REFOUT
EN2
VFB2N
VSET2
LOW NOISE
LDO ACTIVE
FILTER
3A
SYNC
VSET1
PVIN1
BUCK
REGULATOR
3A
VPVIN1: 12V
CPVIN1
10µF
CVREG_LDO
1µF
CVBUF
0.1µF
CVREG
1µF
RTOP1
100kΩ
CPVINSYS
10µF
RBOT1
100kΩ
RC
9.76kΩ
CC
4.7nF
CPVOUT1
44µF
CPVIN2
10µF
CPVOUT2
10µF
L1
3.3µH
SYSTEM
PWRGD
VREG_LDO
CREFOUT
0.22µF
VPVOUT2 = 1.3V
VPVOUT1 = 2.5V
Figure 50. Independent Configuration (Dual Output)



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