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ADP5003ACPZ-R7 数据表(PDF) 22 Page - Analog Devices

部件名 ADP5003ACPZ-R7
功能描述  Low Noise Micro PMU, 3 A Buck Regulator with 3 A LDO
PDF  31 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP5003ACPZ-R7 数据表(HTML) 22 Page - Analog Devices

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ADP5003
Data Sheet
Rev. A | Page 22 of 31
BUCK REGULATOR DESIGN EXAMPLE
This section provides an example of the step by step design
procedures and the external components required for the buck
regulator. Table 10 lists the design requirements for this
example.
Table 10. Example Design Requirements for the Buck Regulator
Parameter
Specification
Input Voltage
VPVIN1 = 12 V
Output Voltage
VPVOUT1 = 2.5 V
Output Current
ILOAD1 = 3 A
Output Ripple
ΔVOUT1_RIPPLE = 25 mV
Load Transient
±5% at 20% to 80% load transient
SETTING THE SWITCHING FREQUENCY FOR THE
BUCK REGULATOR
The first step is to determine the switching frequency for the
ADP5003 design. In general, higher switching frequencies
produce a smaller solution size due to the lower component
values required, whereas lower switching frequencies result in
higher conversion efficiency due to lower switching losses.
The switching frequency of the ADP5003 can be set from
0.3 MHz to 2.5 MHz by connecting a resistor from the RT pin
to ground. The selected resistor allows the user to make decisions
based on the trade-off between efficiency and solution size. (For
more information, see the Oscillator Frequency Control section.)
However, the highest supported switching frequency must be
assessed by checking the voltage conversion limitations enforced
by the minimum on time and the minimum off time (see the
Voltage Conversion Limitations section).
In this design example, a switching frequency of 600 kHz is
used to achieve an ideal combination of small solution size and
high conversion efficiency. To set the switching frequency to
600 kHz, use Equation 1 to calculate the resistor value, RRT. This
gives a standard resistor value of RT = 294 kΩ.
SETTING THE OUTPUT VOLTAGE FOR THE BUCK
REGULATOR
Select a value for the top resistor (RTOP1) and then calculate the
bottom feedback (RBOT1) resistor by using the following
equation:
RBOT1 = (RTOP1 × VPVOUT1)/((VREFOUT × ABUCK) − VPVOUT1) (16)
where:
VPVOUT1 is the buck output voltage.
VREFOUT is 2 V.
ABUCK is the buck regulator gain.
To set the output voltage to 2.5 V, RTOP1 is set to 100 kΩ, giving
an RBOT1 value of 100 kΩ.
SELECTING THE INDUCTOR FOR THE BUCK
REGULATOR
The peak-to-peak inductor ripple current, ΔIL, is set to 35% of
the maximum output current. Use Equation 8 to estimate the
value of the inductor:
L = ((VPVIN1 − VPVOUT1) × D)/(ΔIL × fSW)
where:
VPVIN1 = 12 V.
VPVOUT1 = 2.5 V.
D is the duty cycle (D = VPVOUT1/VPVIN1).
ΔIL = 35% × 3 A = 1.05 A.
fSW = 600 kHz.
The resulting value for L is 3.14 µH. The selected standard
inductor value is 3.3 µH; therefore, ΔIL is 1 A.
To calculate the peak inductor current (IPEAK), use Equation 9:
IPEAK = ILOAD1 + (ΔIL/2)
The calculated peak current for the inductor is 3.5 A.
SELECTING THE OUTPUT CAPACITOR FOR THE
BUCK REGULATOR
The output capacitor must meet the output voltage ripple, load
transient requirements and stability requirements. To meet the
output voltage ripple requirement, use Equation 7 to calculate
the capacitance:
)
(
8
ESR
L
RIPPLE
SW
L
OUT_MIN
R
ΔI
V
f
ΔI
C
×
×
×
The calculated capacitance, COUT_MIN, is 8.7 µF.
To meet the ±5% overshoot and undershoot requirements, use
the following equations to calculate the capacitance:
(
)
UV
OUT
PVOUT
PVIN
STEP
UV
OUT_UV
ΔV
V
V
L
ΔI
K
C
_
1
1
2
2
×
×
×
×
=
(17)
(
)
2
1
2
_
1
2
PVOUT
OV
OUT
PVOUT
STEP
OV
OUT_OV
V
ΔV
V
L
ΔI
K
C
+
×
×
=
(18)
where:
KUV and KOV are factors (typically set to 2).
ΔISTEP is the load step.
ΔVOUT_UV is the allowable undershoot on the output voltage.
ΔVOUT_OV is the allowable overshoot on the output voltage.
For estimation purposes, use KOV = KUV = 2; therefore,
COUT_OV = 33.4 µF and COUT_UV = 9 µF.
It is recommended to use two 22 µF ceramic capacitors.



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