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Data Sheet

ADP5003

Rev. A | Page 23 of 31

DESIGNING THE COMPENSATION NETWORK FOR

THE BUCK REGULATOR

For better load transient and stability performance, set the cross

frequency, fC, to fSW/10. In this example, fSW is set to 600 kHz;

therefore, fC is set to 60 kHz.

kΩ

9.87

A/V

600

2.5

kHz

(

)

3.72

kΩ

7.18

μF

0.001

0.833

4.46

kΩ

7.18

μF

0.001

Choose standard components: RC = 9.76 kΩ, CC = 4.7 nF,

CCP = 4.7 pF.

Figure 47 shows the load transient waveform.

CH2 1.00A

CH3 200mV

M200µs

A CH2

1.08A

432.000µs

CH4 20.0mV

ILOAD2

VVOUT1

VPVOUT2

0.02A/µs

0.015A/µs

Figure 47. 0.6 A to 2.4 A Load Transient for 2.5 V Output, fSW = 0.6 MHz,

L = 3.3 μH, RC = 9.76 kΩ, CC = 4.7 nF, CCP = 4.7 pF, CPVOUT1 = 44 μF

SELECTING THE INPUT CAPACITOR FOR THE BUCK

REGULATOR

For the input capacitor, select a ceramic capacitor with a

minimum capacitance of 10 µF. Place the input capacitor close

to the PVIN1 pin. In this example, one 10 µF, X5R, 25 V

ceramic capacitor is recommended.

ADP5003ACPZ-R7 数据表(PDF) 23 Page - Analog Devices

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