Low Noise Micro PMU,

3 A Buck Regulator with 3 A LDO

Data Sheet

ADP5003

Rev. A

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FEATURES

Low noise, dc power supply system

High efficiency buck for first stage conversion

High PSRR, low noise LDO regulator to remove switching

ripple

Adaptive LDO regulator headroom control option for

optimal efficiency and PSRR across full load range

3 A, low noise, buck regulator

Wide input voltage range: 4.2 V to 15 V

Programmable output voltage range: 0.6 V to 5.0 V

0.3 MHz to 2.5 MHz internal oscillator

0.3 MHz to 2.5 MHz SYNC frequency range

3 A, low noise, NFET LDO regulator (active filter)

Wide input voltage range: 0.65 V to 5 V

Programmable output voltage range: 0.6 V to 3.3 V

Differential point of load remote sensing

3 µV rms output noise (independent of output voltage)

PSRR > 50 dB (to 100 kHz) with 400 mV headroom at 3 A

Ultrafast transient response

Power-good output

Precision enable inputs for both the buck regulator and LDO

−40°C to +125°C operating junction temperature range

32-lead, 5 mm × 5 mm, LFCSP

APPLICATIONS

Low noise power for high speed analog-to-digital converter

(ADC) and digital-to-analog converter (DAC) designs

Powering RF transceivers and clocking ICs

FUNCTIONAL BLOCK DIAGRAM

RT

VOUT1

SW1

L1

SW1

SW1

PGND1

PGND1

PGND1

VREG

PVINSYS

VPVINSYS:

4.2V TO 15V

AGND1

AGND2

PVIN2

PVIN2

PVIN2

PVOUT2

PVOUT2

PVOUT2

VFB2P

EN1

VBUF

COMP1

RC

CC

REFOUT

EN2

VFB2N

VSET2

LOW NOISE

LDO ACTIVE

FILTER

3A

LOAD

SYNC

VPVOUT2:

0.6V TO 3.3V

0.6V TO 5.0V

VSET1

PVIN1

PVIN1

BUCK

REGULATOR

3A

VPVIN1:

4.2V TO 15V

SYSTEM

PWRGD

VREG_LDO

Figure 1.

GENERAL DESCRIPTION

The ADP5003 integrates a high voltage buck regulator and an

ultralow noise low dropout (LDO) regulator in a small, 5 mm ×

5 mm, 32-lead LFCSP package to provide highly efficient and

quiet regulated supplies.

The buck regulator is optimized to operate at high output

currents up to 3 A. The LDO is capable of a maximum output

current of 3 A and operates efficiently with low headroom

voltage while maintaining high power supply rejection.

The ADP5003 can operate in one of two modes. Adaptive mode

allows the LDO to operate with an optimized headroom by

adjusting the buck output voltage internally in response to the

LDO load current. Alternatively, the ADP5003 can operate in

independent mode, where both regulators operate separately

from each other, and where the output voltages are

programmed using resistor dividers.

The LDO regulator output can be accurately controlled at the

point of load (POL) using remote sensing that compensates for the

printed circuit board (PCB) trace impedance while delivering

high output currents.

Each regulator is activated via a dedicated precision enable

input. The buck switching frequency can be synchronized to

an external signal, or programmed with an external resistor.

Safety features in the ADP5003 include thermal shutdown (TSD),

input undervoltage lockout (UVLO) and independent current

limits for each regulator. The ADP5003 is rated for a −40°C to

+125°C operating junction temperature range.