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AM2434...ALV 数据表(PDF) 224 Page - Texas Instruments |
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AM2434...ALV 数据表(HTML) 224 Page - Texas Instruments |
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224 / 280 page  7.10.5.16.1.2 PRU_ICSSG PRU Parallel Capture Mode Timing Table 7-108. PRU_ICSSG PRU Timing Requirements – Parallel Capture Mode see Figure 7-91 and Figure 7-92 NO. PARAMETER DESCRIPTION MIN MAX UNIT PRPC1 tc(CLOCK) Cycle time, CLOCKIN 20 ns PRPC2 tw(CLOCKL) Pulse duration, CLOCKIN low 0.45P(1) ns PRPC3 tw(CLOCKH) Pulse duration, CLOCKIN high 0.45P(1) ns PRPC4 tsu(DATAIN-CLOCK) Setup time, DATAIN valid before CLOCKIN active edge 4 ns PRPC5 th(CLOCK-DATAIN) Hold time, DATAIN valid after CLOCKIN active edge 0 ns (1) P = CLOCKIN cycle time in ns CLOCKIN DATAIN PRPC1 PRPC3 PRPC2 PRPC4 PRPC5 PRU_TIMING_03 Figure 7-91. PRU_ICSSG PRU Parallel Capture Timing Requirements – Rising Edge Mode CLOCKIN DATAIN PRPC1 PRPC2 PRPC3 PRPC5 PRU_TIMING_04 PRPC4 Figure 7-92. PRU_ICSSG PRU Parallel Capture Timing Requirements – Falling Edge Mode AM2434, AM2432, AM2431 SPRSP65D – APRIL 2021 – REVISED AUGUST 2022 www.ti.com 224 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: AM2434 AM2432 AM2431 |
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