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AM2434...ALV 数据表(PDF) 228 Page - Texas Instruments |
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AM2434...ALV 数据表(HTML) 228 Page - Texas Instruments |
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228 / 280 page  Table 7-113. PRU_ICSSG PRU Timing Requirements – Peripheral Interface Mode see Figure 7-97 NO. PARAMETER DESCRIPTION MIN MAX UNIT PRPIF1 tw(PIF_DATA_INH) Pulse duration, PIF_DATA_IN high 2 + 0.475*(4*P) (1) ns PRPIF2 tw(PIF_DATA_INL) Pulse duration, PIF_DATA_IN low 2 + 0.475*(4*P) (1) ns (1) P = 1x (or TX) clock period in ns, defined by PRUn_ED_TX_DIV_FACTOR and PRUn_ED_TX_DIV_FACTOR_FRAC in the ICSSG_PRUn_ED_TX_CFG_REG register. PRUn represents the respective PRU0 or PRU1 instance. PIF_DATA_IN PRPIF1 PRUPIF_TIMING_01 PRPIF2 Figure 7-97. PRU_ICSSG PRU Peripheral Interface Timing Requirements Table 7-114. PRU_ICSSG PRU Switching Characteristics – Peripheral Interface Mode see Figure 7-98 NO. PARAMETER DESCRIPTION MIN MAX UNIT PRPIF3 tc(PIF_CLK) Cycle time, PIF_CLK 30 ns PRPIF4 tw(PIF_CLKH) Pulse duration, PIF_CLK high 0.475*P (1) ns PRPIF5 tw(PIF_CLKL) Pulse duration, PIF_CLK low 0.475*P (1) ns PRPIF6 td(PIF_CLK- PIF_DATA_OUT) Delay time, PIF_CLK fall to PIF_DATA_OUT -5 5 ns PRPIF7 td(PIF_CLK-PIF_DATA_EN) Delay time, PIF_CLK fall to PIF_DATA_EN -5 5 ns (1) P = 1x (or TX) clock period in ns, defined by PRUn_ED_TX_DIV_FACTOR and PRUn_ED_TX_DIV_FACTOR_FRAC in the ICSSG_PRUn_ED_TX_CFG_REG register. PRUn represents the respective PRU0 or PRU1 instance. PIF_CLK PIF_DATA_OUT PRPIF3 PRPIF4 PRPIF6 PRPIF5 PIF_DATA_EN PRPIF7 Figure 7-98. PRU_ICSSG PRU Peripheral Interface Switching Characteristics AM2434, AM2432, AM2431 SPRSP65D – APRIL 2021 – REVISED AUGUST 2022 www.ti.com 228 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: AM2434 AM2432 AM2431 |
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