AM2434...ALV datasheet(230/280 Pages) TI

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7.10.5.16.3 PRU_ICSSG Industrial Ethernet Peripheral (IEP)

Table 7-117. PRU_ICSSG IEP Timing Conditions

PARAMETER

MIN

MAX

UNIT

INPUT CONDITIONS

SRI

Input slew rate

V/ns

OUTPUT CONDITIONS

Output load capacitance

EDC_SYNC_OUTx

EDIO_OUTVALID

EDIO_DATA_OUT

7.10.5.16.3.1 PRU_ICSSG IEP Timing

Table 7-118. PRU_ICSSG IEP Timing Requirements – Input Validated with SYNC

see Figure 7-100

NO.

PARAMETER

DESCRIPTION

MIN

MAX

UNIT

PRIEP1 tw(EDC_SYNC_OUTxL)

Pulse duration, EDC_SYNC_OUTx low

20P(1) - 2

PRIEP2 tw(EDC_SYNC_OUTxH)

Pulse duration, EDC_SYNC_OUTx high

20P(1) - 2

PRIEP3 tsu(EDIO_DATA_IN-

EDC_SYNC_OUTx)

Setup time, EDIO_DATA_IN valid before EDC_SYNC_OUTx active

edge

PRIEP4 th(EDC_SYNC_OUTx-

EDIO_DATA_IN)

Hold time, EDIO_DATA_IN valid after EDC_SYNC_OUTx active

edge

(1)

P = PRU_ICSSG IEP clock source period in ns.

EDC_SYNC_OUTx

PRIEP4

PRIEP2

PRIEP3

EDIO_DATA_IN[7:0]

PRU_IEP_TIMING_01

PRIEP1

Figure 7-100. PRU_ICSSG IEP SYNC Timing Requirements

AM2434, AM2432, AM2431

SPRSP65D – APRIL 2021 – REVISED AUGUST 2022

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