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AM2434...ALV 数据表(PDF) 232 Page - Texas Instruments |
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AM2434...ALV 数据表(HTML) 232 Page - Texas Instruments |
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232 / 280 page  7.10.5.16.4 PRU_ICSSG Universal Asynchronous Receiver Transmitter (UART) Table 7-121. PRU_ICSSG UART Timing Conditions PARAMETER MIN MAX UNIT INPUT CONDITIONS SRI Input slew rate 0.5 5 V/ns OUTPUT CONDITIONS CL Output load capacitance 1 30(1) pF (1) This value represents an absolute maximum load capacitance. As the UART baud rate increases, it may be necessary to reduce the load capacitance to a value less than this maximum limit to provide enough timing margin for the attached device. The output rise/fall times will increase as capacitive load increases, which decreases the time data is valid for the receiver of the attached devices. Therefore, it is important to understand the minimum data valid time required by the attached device at the operating baud rate. Then use the device IBIS models to verify the actual load capacitance on the UART signals will not increase the rise/fall times beyond the point where it violates the minimum data valid time of the attached device. 7.10.5.16.4.1 PRU_ICSSG UART Timing Table 7-122. PRU_ICSSG UART Timing Requirements see Figure 7-103 NO. PARAMETER DESCRIPTION MIN MAX UNIT 1 tw(RXD) Pulse width, receive data bit high or low 0.95U(1) (2) 1.05U(1) (2) ns 2 tw(RXDS) Pulse width, receive start bit low 0.95U(1) (2) ns (1) U = UART baud time in ns = 1/programmed baud rate. (2) This value defines the data valid time, where the input voltage is required to be above VIH or below VIL. Table 7-123. PRU_ICSSG UART Switching Characteristics see Figure 7-103 NO. PARAMETER DESCRIPTION MIN MAX UNIT f(baud) Programmed baud rate 12 Mbps 3 tw(TXD) Pulse width, transmit data bit high or low U(1) - 2 U(1) + 2 ns 4 tw(TXDS) Pulse width, transmit start bit low U(1) - 2 U(1) + 2 ns (1) U = UART baud time in ns = 1/programmed baud rate. 4 Start Bit Data Bits PRG _UART0_TXD i PRU_UART_TIMING_01_RCVRVIHVIL 3 2 Data Bits Bit Start PRG _UART0_RXD i 1 V IH V IL Figure 7-103. PRU_ICSSG UART Timing Requirements and Switching Characteristics AM2434, AM2432, AM2431 SPRSP65D – APRIL 2021 – REVISED AUGUST 2022 www.ti.com 232 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: AM2434 AM2432 AM2431 |
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