AM2434...ALV datasheet(231/280 Pages) TI

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Table 7-119. PRU_ICSSG IEP Switching Characteristics – Digital IOs

see Figure 7-101

NO.

PARAMETER

DESCRIPTION

MIN

MAX

UNIT

IEPIO1

tw(EDIO_OUTVALIDL)

Pulse duration, EDIO_OUTVALID low

14P(1) - 2

IEPIO2

tw(EDIO_OUTVALIDH)

Pulse duration, EDIO_OUTVALID high

32P(1) - 2

IEPIO3

td(EDIO_OUTVALID-

EDIO_DATA_OUT)

Delay time, EDIO_OUTVALID to EDIO_DATA_OUT

18P(1)

IEPIO4

tsk(EDIO_DATA_OUT)

EDIO_DATA_OUT skew

(1)

P = PRU_ICSSG IEP clock source period in ns.

EDIO_DATA_OUT

PRU_EDIO_DATA_OUT_TIMING_00

IEPIO4

Figure 7-101. PRU_ICSSG IEP Digital IOs Timing Requirements

Table 7-120. PRU_ICSSG IEP Timing Requirements – LATCH_INx

see Figure 7-102

NO.

PARAMETER

DESCRIPTION

MIN

MAX

UNIT

PRLA1

tw(EDC_LATCH_INxL)

Pulse duration, EDC_LATCH_INx low

3P(1) + 2

PRLA2

tw(EDC_LATCH_INxH)

Pulse duration, EDC_LATCH_INx high

3P(1) + 2

(1)

P = PRU_ICSSG IEP clock source period in ns.

EDC_LATCH_INx

PRLA2

PRU_IEP_TIMING_02

PRLA1

Figure 7-102. PRU_ICSSG IEP LATCH_INx Timing Requirements

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AM2434, AM2432, AM2431

SPRSP65D – APRIL 2021 – REVISED AUGUST 2022

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