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STM32F405 数据表(PDF) 129 Page - STMicroelectronics |
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STM32F405 数据表(HTML) 129 Page - STMicroelectronics |
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129 / 204 page  DS8626 Rev 9 129/203 STM32F405xx, STM32F407xx Electrical characteristics Figure 44. USB OTG FS timings: definition of data signal rise and fall time USB HS characteristics Unless otherwise specified, the parameters given in Table 62 for ULPI are derived from tests performed under the ambient temperature, fHCLK frequency summarized in Table 61 and VDD supply voltage conditions summarized in Table 60, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 10 • Capacitive load C = 30 pF • Measurement points are done at CMOS levels: 0.5VDD. Refer to Section Section 5.3.16: I/O port characteristics for more details on the input/output characteristics. Table 59. USB OTG FS electrical characteristics(1) 1. Guaranteed by design. Driver characteristics Symbol Parameter Conditions Min Max Unit tr Rise time(2) 2. Measured from 10% to 90% of the data signal. For more detailed informations, please refer to USB Specification - Chapter 7 (version 2.0). CL = 50 pF 420 ns tf Fall time(2) CL = 50 pF 4 20 ns trfm Rise/ fall time matching tr/tf 90 110 % VCRS Output signal crossover voltage - 1.3 2.0 V Table 60. USB HS DC electrical characteristics Symbol Parameter Min.(1) 1. All the voltages are measured from the local ground potential. Max.(1) Unit Input level VDD USB OTG HS operating voltage 2.7 3.6 V Table 61. USB HS clock timing parameters(1) Parameter Symbol Min Nominal Max Unit fHCLK value to guarantee proper operation of USB HS interface -30 - - MHz Frequency (first transition) 8-bit ±10% FSTART_8BIT 54 60 66 MHz ai14137b Cross over points Differential data lines VCRS VSS tf tr |
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