数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

STM32F405 数据表(PDF) 130 Page - STMicroelectronics

部件名 STM32F405
功能描述  Arm® Cortex®-M4 32b MCUFPU, 210DMIPS, up to 1MB Flash/1924KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera
PDF  204 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32F405 数据表(HTML) 130 Page - STMicroelectronics

Back Button STM32F405 Datasheet HTML 126Page - STMicroelectronics STM32F405 Datasheet HTML 127Page - STMicroelectronics STM32F405 Datasheet HTML 128Page - STMicroelectronics STM32F405 Datasheet HTML 129Page - STMicroelectronics STM32F405 Datasheet HTML 130Page - STMicroelectronics STM32F405 Datasheet HTML 131Page - STMicroelectronics STM32F405 Datasheet HTML 132Page - STMicroelectronics STM32F405 Datasheet HTML 133Page - STMicroelectronics STM32F405 Datasheet HTML 134Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 130 / 204 page
background image
Electrical characteristics
STM32F405xx, STM32F407xx
130/203
DS8626 Rev 9
Figure 45. ULPI timing diagram
Frequency (steady state) ±500 ppm
FSTEADY
59.97
60
60.03
MHz
Duty cycle (first transition)
8-bit ±10%
DSTART_8BIT
40
50
60
%
Duty cycle (steady state) ±500 ppm
DSTEADY
49.975
50
50.025
%
Time to reach the steady state frequency and
duty cycle after the first transition
TSTEADY
--
1.4
ms
Clock startup time after the
de-assertion of SuspendM
Peripheral
TSTART_DEV
--
5.6
ms
Host
TSTART_HOST
--
-
PHY preparation time after the first transition
of the input clock
TPREP
--
-
µs
1. Guaranteed by design.
Table 62. ULPI timing
Parameter
Symbol
Value(1)
1. VDD = 2.7 V to 3.6 V and TA = –40 to 85 °C.
Unit
Min.
Max.
Control in (ULPI_DIR) setup time
tSC
-2.0
ns
Control in (ULPI_NXT) setup time
-
1.5
Control in (ULPI_DIR, ULPI_NXT) hold time
tHC
0-
Data in setup time
tSD
-2.0
Data in hold time
tHD
0-
Control out (ULPI_STP) setup time and hold time
tDC
-9.2
Data out available from clock rising edge
tDD
-10.7
Table 61. USB HS clock timing parameters(1)
Parameter
Symbol
Min
Nominal
Max
Unit
Clock
Control In
(ULPI_DIR,
ULPI_NXT)
data In
(8-bit)
Control out
(ULPI_STP)
data out
(8-bit)
tDD
tDC
tHD
tSD
tHC
tSC
ai17361c
tDC



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com