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STM32H757AI 数据表(PDF) 156 Page - STMicroelectronics

部件名 STM32H757AI
功能描述  Dual 32-bit Arm® Cortex®-M7 up to 480MHz and -M4 MCUs, 2MB Flash, 1MB RAM, 46 com. and analog interfaces, SMPS, DSI, crypto
PDF  251 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32H757AI 数据表(HTML) 156 Page - STMicroelectronics

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Electrical characteristics
STM32H757xI
156/251
DS12931 Rev 1
All I/Os are CMOS and TTL compliant (no software configuration required). Their
characteristics cover more than the strict CMOS-technology or TTL parameters. The
coverage of these requirements for FT I/Os is shown in Figure 27.
Figure 27. VIL/VIH for all I/Os except BOOT0
Output driving current
The GPIOs (general purpose input/outputs) can sink or source up to ±8 mA, and sink or
source up to ±20 mA (with a relaxed VOL/VOH).
In the user application, the number of I/O pins which can drive current must be limited to
respect the absolute maximum rating specified in Section 6.2. In particular:
The sum of the currents sourced by all the I/Os on VDD, plus the maximum Run
consumption of the MCU sourced on VDD, cannot exceed the absolute maximum rating
ΣIVDD (see Table 21).
The sum of the currents sunk by all the I/Os on VSS plus the maximum Run
consumption of the MCU sunk on VSS cannot exceed the absolute maximum rating
ΣIVSS (see Table 21).
6. VIN must be less than Max(VDDXXX) + 3.6 V.
7. To sustain a voltage higher than MIN(VDD, VDDA, VDD33USB) +0.3 V, the internal pull-up and pull-down resistors must be
disabled.
8. The pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This
PMOS/NMOS contribution to the series resistance is minimal (~10% order).
9. Max(VDDXXX) is the maximum value of all the I/O supplies.
MSv46121V3
0
0.5
1
1.5
2
2.5
3
1.6
1.8
2
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
TLL requirement: VIHmin = 2 V
TLL requirement: VILmin = 0.8 V
CMOS
requirement:
VIHmin
=0.7V
DD
CMOS
requirement:
VILmax
=0.3VDD
Based
on simulation
VIHmin=
0.47VDD
+0.25
Based
on simulation
VILmax
=0.4VDD
-0.1



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