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EFP01 数据表(PDF) 40 Page - Silicon Laboratories

部件名 EFP01
功能描述  EFP01 Energy Friendly PMIC Family
PDF  158 Pages
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制造商  SILABS [Silicon Laboratories]
网页  http://www.silabs.com
标志 SILABS - Silicon Laboratories

EFP01 数据表(HTML) 40 Page - Silicon Laboratories

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5.1.3.2 General Operating Conditions
Table 5.3. General Operating Conditions
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Operating junction tempera-
ture
TJ
-G grade devices
-40
100
°C
VIO input voltage range
VIOIN
1.7
5.5
V
Quiescent current into VDDA
pin
IQ_VDDA
EM0, VDDA=1.8V
24
670
nA
EM2, VDDA=1.8V
24
670
nA
Quiescent current into VDDB
pin1
IQ_VDDB
EM4, all coarse regulators ena-
bled
57
2060
nA
EM0, 1 output enabled
800
13080
nA
EM2, 1 output enabled
300
12140
nA
EM0, 2 outputs enabled
1400
16450
nA
EM2, 2 outputs enabled
425
14820
nA
EM0, 3 outputs enabled
2000
16940
nA
EM2, 3 outputs enabled
525
15080
nA
Bootup time from VDDB ris-
ing above POR threshold un-
til device ready to receive
I2C commands
TBOOT
1200
µs
Time from EM2 to EM0
TEM2_EM0
Time from EM2 exit until DCDC
enters EM0 mode (i.e, EM0 BIAS,
IPK, and voltage target settings
are applied, but the output voltage
target may still be transitioning if
there was a voltage target change
from EM2 to EM0).
0.2
µs
Time from EM2 exit until DCDC
enters EM0 mode and EM0 output
target voltage is reached. Buck
Mode, COUT = 2.2 µF, VOB_EM2
= 1.0 V, VOB_EM0 =1 .2 V,
BK_IPK = 16, VDDB = 3.0 V
4
µs
Time from EM4 to EM2
TEM4_EM2
Time from EM4 exit until until
DCDC begins switching in EM2
mode. During this period, no addi-
tional load should be applied to
the DCDC output
50
µs
Time from EM4 exit until DCDC
begins switching in EM2 mode
and output target voltage is
reached. Buck Mode, COUT = 10
µF, VDDB = 3.0 V, VOA_V = 2.8
V, BB_IPK_EM2 = 4
125
µs
Digital IO internal pull-up re-
sistor
RPU
I2C SDA, I2C SCL, and IRQn
3.7
kΩ
Digital output low voltage
VOL
VIO*0.3
V
EFP01 Energy Friendly PMIC Family Data Sheet
Electrical Specifications
silabs.com | Building a more connected world.
Rev. 1.3 | 40



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