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3.2.2.5 DCDC B with LDO B in Parallel

DCDC B is internally connected in parallel with LDO B, and the two can optionally be used in parallel. This configuration is advanta-

geous when the minimum input supply voltage (VDDB) approaches the VOB output voltage (e.g., VDDBMIN - VOB ≤ 300mV) as it al-

lows EFP01 to continue to regulate the output voltage over a wider input voltage range than is possible with DCDC B alone.

When LDO B is used in parallel with DCDC B:

• The DCDC mode must be set to BUCKLDO (i.e., BK_MODE = 3 in the BK_CTRL1 register).

• The input voltage threshold for transition from Buck-to-LDO mode can be adjusted by the BK_LDO_THRESH bit field in the

BB_CTRL2 register. It is recommended that this setting be left at power-on default value.

3.2.3 LDO B and LDO C Overview

The EFP01 has two integrated LDOs supplied from the VDDB pin. Instead of being continously on, each LDO operates in a pulsed-

current mode that minimizes quiescent current and is compatible with the internal Coulomb counter.

3.2.3.1 LDO B

LDO B is hard-wired in parallel with DCDC B, with an output sharing the VOB pin. When used in parallel with DCDC B, DCDC B will

automatically switch to LDO B to provide better efficiency as the input voltage approaches the output voltage. LDO B can also be used

as a standalone LDO (i.e. without DCDC B).

LDO B shares the DCDC B output voltage target registers, VOB_EM0_V and VOB_EM2_V.

Table 3.4. LDO B Summary

Mode

Required Register Configuration(s)

Output Pin

Output Target Voltage Registers

In parallel with DCDC B

BK_CTRL1.BK_MODE = 3

VOB

VOB_EM0_V and VOB_EM2_V

Standalone, no DCDC

BK_CTRL1.BK_MODE = 2

3.2.3.2 LDO C

Similar to LDO B, LDO C can be used as an independent standalone supply (with the LDO output on the VOC pin) or may be connec-

ted in parallel with DCDC A (with the LDO output sharing the VOA pin with DCDC A). When used in parallel with DCDC A, DCDC A will

automatically switch to LDO C to provide better efficiency as the input voltage approaches the output voltage.

LDO C's output voltage register depends on the mode:

• In standalone mode, the output voltage target is set in the VOC_V register.

• In parallel mode, the LDO C shares DCDC A's output voltage register, VOA_V.

Table 3.5. LDO C Summary

Mode

Required Register Configuration(s)

Output Pin

Output Target Voltage Regis-

ter

In parallel with

DCDC A

BB_CTRL3.BB_MODE = 5

VOA = VOC (must be shorted to-

gether on PCB)

VOA_V

Standalone, no

DCDC

LDOC_CTRL.LDOC_ENA_SA = 1 and

BB_CTRL3.BB_MODE != 5

VOC

VOC_V

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