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EFP01 数据表(PDF) 27 Page - Silicon Laboratories

部件名 EFP01
功能描述  EFP01 Energy Friendly PMIC Family
PDF  158 Pages
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制造商  SILABS [Silicon Laboratories]
网页  http://www.silabs.com
标志 SILABS - Silicon Laboratories

EFP01 数据表(HTML) 27 Page - Silicon Laboratories

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3.5 Memory
3.5.1 OTP
The EFP01 has contains OTP memory that is programmed at the factory to load calibration constants and configuration defaults into
the registers. The default configuration may be modified after power-up by overwriting the corresponding register via I2C write. Addition-
ally, any OTP address can be directly read through register I2C accesses.
The out-of-reset default OTP configuration can be restored by three methods:
1. A VDDA/VDDB/VBOOST power-cycle, resulting in a POR
2. Setting the CMD.OTP_REREAD bit. This will cause the EFP01 registers to be overwritten with the OTP defaults.
3. Setting the CMD.RESET bit. This will cause the EFP01 registers to be momentarily cleared to 0, and then overwritten with the OTP
defaults.
Note: When the converter mode bitfields are cleared to 0, any enabled converters or LDOs will be disabled for ~400us, which can
result in a supply brown-out. For this reason, use of CMD.OTP_REREAD is recommended instead.
Note: When the EFP01 DCDC B is powering the EFR32 DECOUPLE supply, the out-of-reset mode for DCDC B is Disabled. If the
EFR32 is not also getting reset, the EFR32 internal LDO must be re-enabled before resetting the OTP to its default values.
Refer to the OTP Definition section for more details and default OTP programming.
3.5.2 Registers
The EFP01 is controlled and configured via access to its Registers. Register access is supported in all of EFP01's energy modes (i.e.,
EM0, EM2, and EM4).
Default configuration and calibration register values are automatically loaded from OTP at boot (see 7.2 OTP Defaults).
Refer to the Register Definitions section for more details.
3.6 Communications and Other Digital Peripherals
3.6.1 Inter-Integrated Circuit Interface (I2C)
The I2C module provides an interface between the EFP01 and the host MCU. It is capable of operating in I2C secondary/device mode
only, with transmission rates from 10 kbit/s up to 5 Mbit/s, and can function in EM0, EM2, and EM4. The EFP01 uses a fixed I2C ad-
dress of 0x60.
The I2C module has internal pull ups on its SDA and SCL pins that are enabled automatically at startup. These internal pull ups can be
disabled using the I2C_PU bit in the I2C_CTRL register.
In addition, the I2C module provides an optional, non-standard Direct Mode feature to allow fast transitions between Energy Modes
(described in 3.3.1 Energy Mode Control). EFP01's internal pull ups are automatically disabled when Direct Mode is enabled.
Note: Direct Mode is primarily intended for applications where the EFP01 is the only device on the I2C bus - other I2C devices may not
tolerate the non-standard I2C states used by Direct Mode.
EFP01 Energy Friendly PMIC Family Data Sheet
System Overview
silabs.com | Building a more connected world.
Rev. 1.3 | 27



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