R5F104FCAFP datasheet(45/207 Pages) RENESAS

45 / 207 page

RL78/G13

1. OUTLINE

R01DS0131EJ0350 Rev.3.50

45 of 200

Jun 30, 2020

Notes 2.

Only the constant-period interrupt function when the low-speed on-chip oscillator clock (fIL) is selected

The number of PWM outputs varies depending on the setting of channels in use (the number of masters and

slaves) (see 6.9.3 Operation as multiple PWM output function in the RL78/G13 User’s Manual).

When setting to PIOR = 1

(2/2)

Item

20-pin

24-pin

25-pin

30-pin

32-pin

36-pin

Clock output/buzzer output

–

● 2.44 kHz, 4.88 kHz, 9.76 kHz, 1.25 MHz, 2.5 MHz, 5 MHz, 10 MHz

(Main system clock: fMAIN = 20 MHz operation)

8/10-bit resolution A/D converter

6 channels

8 channels

Serial interface

[20-pin, 24-pin, 25-pin products]

● CSI: 1 channel/simplified I2C: 1 channel/UART: 1 channel

[30-pin, 32-pin products]

● CSI: 1 channel/simplified I2C: 1 channel/UART: 1 channel

● CSI: 1 channel/simplified I2C: 1 channel/UART (UART supporting LIN-bus): 1 channel

[36-pin products]

● CSI: 1 channel/simplified I2C: 1 channel/UART: 1 channel

● CSI: 2 channels/simplified I2C: 2 channels/UART (UART supporting LIN-bus): 1 channel

I2C bus

–

1 channel

Multiplier and divider/multiply-

accumulator

● 16 bits × 16 bits = 32 bits (Unsigned or signed)

● 32 bits ÷ 32 bits = 32 bits (Unsigned)

● 16 bits × 16 bits + 32 bits = 32 bits (Unsigned or signed)

DMA controller

2 channels

Vectored interrupt

sources

Internal

External

Key interrupt

–

Reset

● Reset by RESET pin

● Internal reset by watchdog timer

● Internal reset by power-on-reset

● Internal reset by voltage detector

● Internal reset by illegal instruction execution Note

● Internal reset by RAM parity error

● Internal reset by illegal-memory access

Power-on-reset circuit

● Power-on-reset:

1.51 V (TYP.)

● Power-down-reset: 1.50 V (TYP.)

Voltage detector

● Rising edge :

1.67 V to 4.06 V (14 stages)

● Falling edge :

1.63 V to 3.98 V (14 stages)

On-chip debug function

Provided

Power supply voltage

VDD = 1.6 to 5.5 V (TA = -40 to +85°C)

VDD = 2.4 to 5.5 V (TA = -40 to +105°C)

Operating ambient temperature

TA = 40 to +85°C (A: Consumer applications, D: Industrial applications )

TA = 40 to +105°C (G: Industrial applications)

Note

The illegal instruction is generated when instruction code FFH is executed.

Reset by the illegal instruction execution not issued by emulation with the in-circuit emulator or on-chip debug

emulator.

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