R5F104FCAFP datasheet(58/207 Pages) RENESAS

部件名	R5F104FCAFP

功能描述	True low-power platform (66 μA/MHz, and 0.57 μA for operation with only RTC and LVD) for the general-purpose applications, with 1.6-V to 5.5-V operation, 16- to 512-Kbyte code flash memory, and 41 DMIPS at 32 MHz

PDF	207 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

标志

58 / 207 page

RL78/G13

2. ELECTRICAL SPECIFICATIONS (TA = –40 to +85°C)

R01DS0131EJ0350 Rev.3.50

58 of 200

Jun 30, 2020

(TA = –40 to +85°C, 1.6 V

≤ EVDD0 = EVDD1 ≤ VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) (5/5)

Items

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

Input leakage

current, high

ILIH1

P00 to P07, P10 to P17,

P30 to P37, P40 to P47,

P50 to P57, P60 to P67,

P70 to P77, P80 to P87,

P90 to P97, P100 to P106,

P110 to P117, P120,

P125 to P127, P140 to P147

VI = EVDD0

µA

ILIH2

P20 to P27, P137,

P150 to P156, RESET

VI = VDD

µA

ILIH3

P121 to P124

(X1, X2, XT1, XT2, EXCLK,

EXCLKS)

VI = VDD

In input port or

external clock

input

µA

In resonator

connection

µA

Input leakage

current, low

ILIL1

P00 to P07, P10 to P17,

P30 to P37, P40 to P47,

P50 to P57, P60 to P67,

P70 to P77, P80 to P87,

P90 to P97, P100 to P106,

P110 to P117, P120,

P125 to P127, P140 to P147

VI = EVSS0

–1

µA

ILIL2

P20 to P27, P137,

P150 to P156, RESET

VI = VSS

–1

µA

ILIL3

P121 to P124

(X1, X2, XT1, XT2, EXCLK,

EXCLKS)

VI = VSS

In input port or

external clock

input

–1

µA

In resonator

connection

–10

µA

On-chip pll-up

resistance

P00 to P07, P10 to P17,

P30 to P37, P40 to P47,

P50 to P57, P64 to P67,

P70 to P77, P80 to P87,

P90 to P97, P100 to P106,

P110 to P117, P120,

P125 to P127, P140 to P147

VI = EVSS0, In input port

100

Remark

Unless specified otherwise, the characteristics of alternate-function pins are the same as those of the port

pins.

R5F104FCAFP 数据表(PDF) 58 Page - Renesas Technology Corp

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