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R5F104FCAFP 数据表(PDF) 62 Page - Renesas Technology Corp |
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R5F104FCAFP 数据表(HTML) 62 Page - Renesas Technology Corp |
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62 / 207 page ![]() RL78/G13 2. ELECTRICAL SPECIFICATIONS (TA = –40 to +85°C) R01DS0131EJ0350 Rev.3.50 62 of 200 Jun 30, 2020 Notes 1. Total current flowing into VDD and EVDD0, including the input leakage current flowing when the level of the input pin is fixed to VDD, EVDD0 or VSS, EVSS0. The values below the MAX. column include the peripheral operation current. However, not including the current flowing into the A/D converter, LVD circuit, I/O port, and on-chip pull-up/pull-down resistors and the current flowing during data flash rewrite. 2. During HALT instruction execution by flash memory. 3. When high-speed on-chip oscillator and subsystem clock are stopped. 4. When high-speed system clock and subsystem clock are stopped. 5. When high-speed on-chip oscillator and high-speed system clock are stopped. When RTCLPC = 1 and setting ultra-low current consumption (AMPHS1 = 1). The current flowing into the RTC is included. However, not including the current flowing into the 12-bit interval timer and watchdog timer. 6. Not including the current flowing into the RTC, 12-bit interval timer, and watchdog timer. 7. Relationship between operation voltage width, operation frequency of CPU and operation mode is as below. HS (high-speed main) mode: 2.7 V ≤ VDD ≤ 5.5 V@1 MHz to 32 MHz 2.4 V ≤ VDD ≤ 5.5 V@1 MHz to 16 MHz LS (low-speed main) mode: 1.8 V ≤ VDD ≤ 5.5 V@1 MHz to 8 MHz LV (low-voltage main) mode: 1.6 V ≤ VDD ≤ 5.5 V@1 MHz to 4 MHz 8. Regarding the value for current to operate the subsystem clock in STOP mode, refer to that in HALT mode. Remarks 1. fMX: High-speed system clock frequency (X1 clock oscillation frequency or external main system clock frequency) 2. fIH: High-speed on-chip oscillator clock frequency 3. fSUB: Subsystem clock frequency (XT1 clock oscillation frequency) 4. Except subsystem clock operation and STOP mode, temperature condition of the TYP. value is TA = 25°C |
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