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R5F104FCAFP 数据表(PDF) 90 Page - Renesas Technology Corp

部件名 R5F104FCAFP
功能描述  True low-power platform (66 μA/MHz, and 0.57 μA for operation with only RTC and LVD) for the general-purpose applications, with 1.6-V to 5.5-V operation, 16- to 512-Kbyte code flash memory, and 41 DMIPS at 32 MHz
PDF  207 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

R5F104FCAFP 数据表(HTML) 90 Page - Renesas Technology Corp

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RL78/G13
2. ELECTRICAL SPECIFICATIONS (TA = –40 to +85°C)
R01DS0131EJ0350 Rev.3.50
90 of 200
Jun 30, 2020
UART mode bit width (during communication at different potential) (reference)
TxDq
RxDq
Baud rate error tolerance
Baud rate error tolerance
Low-bit width
High-/Low-bit width
High-bit width
1/Transfer rate
1/Transfer rate
Remarks 1.
Rb[
Ω]:Communication line (TxDq) pull-up resistance,
Cb[F]: Communication line (TxDq) load capacitance, Vb[V]: Communication line voltage
2.
q: UART number (q = 0 to 3), g: PIM and POM number (g = 0, 1, 8, 14)
3.
fMCK: Serial array unit operation clock frequency
(Operation clock to be set by the CKSmn bit of serial mode register mn (SMRmn).
m: Unit number, n: Channel number (mn = 00 to 03, 10 to 13))
4.
UART2 cannot communicate at different potential when bit 1 (PIOR1) of peripheral I/O redirection register
(PIOR) is 1.



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