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R5F104FCAFP 数据表(PDF) 162 Page - Renesas Technology Corp |
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R5F104FCAFP 数据表(HTML) 162 Page - Renesas Technology Corp |
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162 / 207 page  RL78/G13 3. ELECTRICAL SPECIFICATIONS (G: INDUSTRIAL APPLICATIONS TA = –40 to +105°C) R01DS0131EJ0350 Rev.3.50 162 of 200 Jun 30, 2020 3.5.2 Serial interface IICA (TA = –40 to +105°C, 2.4 V ≤ EVDD0 = EVDD1 ≤ VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions HS (high-speed main) Mode Unit Standard Mode Fast Mode MIN. MAX. MIN. MAX. SCLA0 clock frequency fSCL Fast mode: fCLK ≥ 3.5 MHz – – 0 400 kHz Standard mode: fCLK ≥ 1 MHz 0 100 – – kHz Setup time of restart condition tSU:STA 4.7 0.6 µs Hold timeNote 1 tHD:STA 4.0 0.6 µs Hold time when SCLA0 = “L” tLOW 4.7 1.3 µs Hold time when SCLA0 = “H” tHIGH 4.0 0.6 µs Data setup time (reception) tSU:DAT 250 100 ns Data hold time (transmission)Note 2 tHD:DAT 0 3.45 0 0.9 µs Setup time of stop condition tSU:STO 4.0 0.6 µs Bus-free time tBUF 4.7 1.3 µs Notes 1. The first clock pulse is generated after this period when the start/restart condition is detected. 2. The maximum value (MAX.) of tHD:DAT is during normal transfer and a wait state is inserted in the ACK (acknowledge) timing. Caution The values in the above table are applied even when bit 2 (PIOR2) in the peripheral I/O redirection register (PIOR) is 1. At this time, the pin characteristics (IOH1, IOL1, VOH1, VOL1) must satisfy the values in the redirect destination. Remark The maximum value of Cb (communication line capacitance) and the value of Rb (communication line pull-up resistor) at that time in each mode are as follows. Standard mode: Cb = 400 pF, Rb = 2.7 k Ω Fast mode: Cb = 320 pF, Rb = 1.1 k Ω IICA serial transfer timing tR tBUF tF tLOW tHIGH tHD:STA Stop condition Start condition Restart condition Stop condition tSU:DAT tSU:STA tSU:STO tHD:STA tHD:DAT SCLAn SDAAn Remark n = 0, 1 |
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