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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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ES9842PRO 数据表(PDF) 96 Page - ESS Technology,Inc |
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ES9842PRO 数据表(HTML) 96 Page - ESS Technology,Inc |
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96 / 167 page  CONFIDENTIAL ADVANCE INFORMATION ES9842 PRO Product Datasheet 96 VERSION 0.5 ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 WWW.ESSTECH.COM • 9'd0: No delay (default) • 9'd1: Delay the I2S input data by 1 sample • 9'd2: Delay the I2S input data by 2 samples • 9'd511: Delay the I2S input data by 511 samples Register 63: ADC CH1 CONFIG 1 Bits [7:6] [5:4] [3] [2] [1] [0] Default 2'b00 2'b00 1'b0 1'b0 1'b0 1'b0 Bits Mnemonic Description [7:6] ADC_INT23_SEL_CH1 ADC integrator 2 and 3 control. • Program to 2'b11 for optimum performance [5:4] ADC_INT1_SEL_CH1 ADC integrator 1 control. • Program to 2'b10 for optimum performance [3] ADC_EN_FB_CH1 Enable ADC1 feedback path. • 1'b0: Disabled (default) • 1'b1: Enabled [2] RESERVED NA [1] ADC_EN_INT_CH1 Enable for INT for Channel 1. • 1'b0: Disabled (default) • 1'b1: Enabled [0] ADC_EN_CH1 Enable for Comparator and Logic for Channel 1. • 1'b0: Disabled (default) • 1'b1: Enabled |
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