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MPC5553 数据表(PDF) 26 Page - Freescale Semiconductor, Inc

部件名 MPC5553
功能描述  Microcontroller Data Sheet
PDF  66 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

MPC5553 数据表(HTML) 26 Page - Freescale Semiconductor, Inc

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MPC5553 Microcontroller Data Sheet, Rev. 2.0
Electrical Characteristics
Freescale Semiconductor
26
Figure 4. Pad Output Delay
3.13
AC Timing
3.13.1
Reset and Configuration Pin Timing
2 This parameter is supplied for reference and is guaranteed by design and tested.
3 The delay, and the rise and fall, are measured to 20% or 80% of the respective signal.
4 Out delay is shown in Figure 4. Add a maximum of one system clock to the output delay for delay with respect to system clock.
5 This parameter is guaranteed by characterization before qualification rather than 100% tested.
Table 19. Reset and Configuration Pin Timing1
1 Reset timing specified at: F
SYS = 132 MHz; VDDEH = 3.0–5.25 V; VDD = 1.35–1.65 V; and TA = TL to TH.
Spec
Characteristic
Symbol
Min
Max
Unit
1
RESET pulse width
tRPW
10
tCYC
2
RESET glitch detect pulse width
tGPW
2—
tCYC
3
PLLCFG, BOOTCFG, WKPCFG, RSTCFG setup time to RSTOUT valid
tRCSU
10
tCYC
4
PLLCFG, BOOTCFG, WKPCFG, RSTCFG hold time from RSTOUT valid
tRCH
0—
tCYC
VDD ÷ 2
VOH
VOL
Rising-edge
out delay
Falling-edge
Pad
internal data
Pad
output
out delay
input signal



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