MPC5553_07 datasheet(63/66 Pages) FREESCALE

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MPC5553 Revision History

MPC5553 Microcontroller Data Sheet, Rev. 2.0

Freescale Semiconductor

Table 33 is the new format for the Revision History and changes continue from Table 32.

Table 33. MPC5553 Revision History (continued)

Revision

Author

Date

Substantive Change(s)

Rev. 1.1

02/02/07

Changes per RD initial review:

• Changed the values in Table 14 for the H7Fa Flash pre-program and erase times.

Typical and Initial Max values changed.

• Typical Values —

16 Kbytes: from 265 to 325

48 Kbytes: from 340 to 435

64 Kbytes: from 400 to 525

128 Kbytes: from 500 to 675

• Initial Max Values —

16 Kbytes: from 400 to 525

48 Kbytes: from 400 to 525

64 Kbytes: from 500 to 675

128 Kbytes: from 1250 to 1800

Rev. 1.1

02/06/07

Changes per RD second review:

• Added Figure 3 to show interpolated IDDSTBY values listed in Table 9.

• Table 9 DC Electrical Specifications: Changed wording of footnote 3. Spec 28:

Corrected conditional text error showing wrong frequency. Spec 29: Deleted

frequency information.

• Table 6 FMPLL Electrical Characteristics: Grouped (2 x Cl) in Specs 12 and 13.

• Table 7 Power Sequence Pin Status for Fast Pads, updated paragraph.

• Table 8 Power Sequence Pin Status, updated preceding paragraph.

• Section 3.7.1, “Input Value of Pins During POR Dependent on VDD33 Updated

paragraph to remove redundancy,

• Table 16 Flash BIU Settlings: Changed wording of footnote from “Can be changed

after Analysis and Characterization” to “These values may change after

characterization.”

• Table 17and Table 18: Deleted the words ‘not’ from footnote 2. Changed from ‘This

parameter is supplied for reference and is not guaranteed by design and not tested’

to ‘This parameter is supplied for reference and is guaranteed by design and tested.’

• Table 22 Bus Operation Timing: Specs 5 and 6: corrected format to show the bus

timing values for various frequencies with EBTS bit = 0 and EBTS bit = 1.

Specs 6 and 7: Added the calibrations signals: CAL_ADDR, CAL_WE/BE, CAL_CS,

CAL_DATA.

• Table 26 DSPI Timing: Added to beginning of footnote 1 ‘All DSPI timing

specifications use the fastest slew rate (SRC=0b11) on pad type M or MH. DSPI

signals using pad types of S or SH have an additional delay based on the slew rate.’

• Table 27 EQADC SS Timing Characteristics: combined footnotes 1 and 2. Moved

footnotes 1 and 2 to Spec 2 and deleted Spec 1.

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