数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ADIN1100CCPZ-R7 数据表(PDF) 55 Page - Analog Devices

部件名 ADIN1100CCPZ-R7
功能描述  Robust, Industrial, Low Power 10BASE-T1L PHY
PDF  80 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADIN1100CCPZ-R7 数据表(HTML) 55 Page - Analog Devices

Back Button ADIN1100CCPZ-R7 Datasheet HTML 51Page - Analog Devices ADIN1100CCPZ-R7 Datasheet HTML 52Page - Analog Devices ADIN1100CCPZ-R7 Datasheet HTML 53Page - Analog Devices ADIN1100CCPZ-R7 Datasheet HTML 54Page - Analog Devices ADIN1100CCPZ-R7 Datasheet HTML 55Page - Analog Devices ADIN1100CCPZ-R7 Datasheet HTML 56Page - Analog Devices ADIN1100CCPZ-R7 Datasheet HTML 57Page - Analog Devices ADIN1100CCPZ-R7 Datasheet HTML 58Page - Analog Devices ADIN1100CCPZ-R7 Datasheet HTML 59Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 55 / 80 page
background image
Data Sheet
ADIN1100
REGISTER SUMMARY
analog.com
Rev. B | 55 of 80
Table 70. Bit Descriptions for AN_STATUS (Continued)
Bits
Bit Name
Description
Reset
Access
AN_LP_ADV_ABILITY_x registers are valid. This bit returns 0 if the autonegotiation is disabled, clearing
the AN_EN bit.
4
AN_REMOTE_FAULT
Autonegotiation Remote Fault. Remote fault is set in the base page received from the link partner.
0x0
R LH
3
AN_ABLE
Autonegotiation Ability. When this bit is read as 1, it indicates that the PHY is able to perform
autonegotiation.
0x1
R
2
AN_LINK_STATUS
Link Status. When read as 1, this bit indicates that a valid link has been established. If this bit reads 0, it
means that the link has failed since the last time it was read.
0x0
R LL
[1:0]
RESERVED
Reserved.
0x0
R
BASE-T1 Autonegotiation Advertisement Register, Bits[15:0]
Device Address: 0x07; Register Address: 0x0202, Reset: 0x0001, Name: AN_ADV_ABILITY_L
This address corresponds to the BASE-T1 autonegotiation advertisement register, Bits[15:0], specified in Clause 45.2.7.21 of Standard 802.3.
Table 71. Bit Descriptions for AN_ADV_ABILITY_L
Bits
Bit Name
Description
Reset
Access
15
AN_ADV_NEXT_PAGE_REQ
Next Page Request. This bit indicates to the link partner that the PHY wants to send a next
page. See IEEE Standard 802.3 Subclause 98.2.1.2.9.
0x0
R/W
14
AN_ADV_ACK
Acknowledge (ACK). This bit indicates that the device has received the link codeword of its link
partner. See IEEE Standard 802.3 Subclause 98.2.1.2.8.
0x0
R
13
AN_ADV_REMOTE_FAULT
Remote Fault. See IEEE Standard 802.3 Subclause 98.2.1.2.7.
0x0
R/W
12
AN_ADV_FORCE_MS
Force Master/Slave Configuration. This bit allows the PHY to force its master/slave
configuration. When this bit is set as 0, the master/slave configuration is a preferred mode.
(The configuration in AN_ADV_MST is a preferred configuration.) If this bit is set to 1, the
master/slave configuration is a forced mode. (The configuration in AN_ADV_MST is a forced
configuration.) See IEEE Standard 802.3 Subclause 98.2.1.2.5 for more details.
0x0
R/W
[11:10]
AN_ADV_PAUSE
Pause Ability. This bit field advertises support for asymmetric and symmetric pause functions on
full duplex links. See IEEE Standard 802.3 Subclause 98.2.1.2.6 for more details.
0x0
R/W
[9:5]
RESERVED
Reserved.
0x0
R
[4:0]
AN_ADV_SELECTOR
Selector. The value of this bit field is fixed at 00001, which is the IEEE 802.3 selector value.
See IEEE Standard 802.3 Subclause 98.2.1.2.1.
0x1
R
BASE-T1 Autonegotiation Advertisement Register, Bits[31:16]
Device Address: 0x07; Register Address: 0x0203, Reset: 0x4000, Name: AN_ADV_ABILITY_M
This address corresponds to the BASE-T1 autonegotiation advertisement register, Bits[31:16], specified in Clause 45.2.7.21 of Standard 802.3.
Table 72. Bit Descriptions for AN_ADV_ABILITY_M
Bits
Bit Name
Description
Reset
Access
15
RESERVED
Reserved.
0x0
R
14
AN_ADV_B10L
10BASE-T1L Ability. This bit indicates that the device is compatible with 10BASE-T1L.
0x1
R/W
[13:5]
RESERVED
Reserved.
0x0
R
4
AN_ADV_MST
Master/Slave Configuration. This bit advertises the master/slave configuration, as follows: 0: slave,
1: master. See also the AN_ADV_FORCE_MS bit, which determines whether this bit expresses a
preference or a forced value. See IEEE Standard 802.3 Subclause 98.2.1.2.3 (master/slave configuration
is Bit 4 of the transmitted nonce field).
Pin dependent
R/W
[3:0]
RESERVED
Reserved.
0x0
R



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com