ADIN1100CCPZ-R7 datasheet(61/80 Pages) AD

61 / 80 page

Data Sheet

ADIN1100

analog.com

Rev. B | 61 of 80

Table 86. Bit Descriptions for AN_STATUS_EXTRA (Continued)

Bits

Bit Name

Description

Reset

Access

[8:7]

AN_TX_LVL_RSLTN

Autonegotiation Tx Level Result. Transmit level high/low resolution result, determined as per IEEE

Standard 802.3cg Subclause 146.6.4. This is encoded as follows:

0x0

0: not run.

2: success, low transmit levels (1.0 V p-p) selected.

3: success, high transmit levels (2.4 V p-p) selected.

[6:5]

AN_MS_CONFIG_RSLTN

Master/Slave Resolution Result. Determined as per master/slave configuration of IEEE Standard

802.3. This is encoded as follows:

0x0

0: not run.

1: configuration fault.

2: success, PHY is configured as slave.

3: success, PHY is configured as master.

[4:1]

AN_HCD_TECH

Highest Common Denominator (HCD) PHY Technology. As selected by the priority resolution

function of IEEE Standard 802.3 Subclause 98.2.4.2. Consider all values that are not shown to be

reserved.

0x0

0: null (not run).

1: 10BASE-T1L.

AN_LINK_GOOD

Autonegotiation Complete Indication. This corresponds to the an_link_good state of IEEE Standard

802.3 Subclause 98.5.1. This signal indicates completion of the autonegotiation transmission, and

that the enabled PHY technology is either bringing up its link or that it has brought up its link. See

also AN_COMPLETE, which is similar, but also indicates that the PHY link is up.

0x0

PHY Instantaneous Status Register

Device Address: 0x07; Register Address: 0x8030, Reset: 0x0010, Name: AN_PHY_INST_STATUS

This register address provides access to instantaneous status indications. These values are not latched. The set of indications returned by this

Table 87. Bit Descriptions for AN_PHY_INST_STATUS

Bits

Bit Name

Description

Reset

Access

[15:5]

RESERVED

Reserved.

0x0

IS_AN_TX_EN

Autonegotiation Tx Enable Status. Autonegotiation transmit enable. This bit indicates that the autonegotiation is

active and controlling the transmitter, and arbitration has not yet reached the autonegotiation (AN) good check

state or the AN good state. That is, the link_control signals have not been set to enable.

0x1

IS_CFG_MST

Master Status. If link_control = enable (for example, B10L_LINK_CTRL_EN = 1), this indicates whether the PHY is

operating as master (and not slave).

0x0

IS_CFG_SLV

Slave Status. If link_control = enable (for example, B10L_LINK_CTRL_EN = 1), this indicates whether the PHY is

operating as slave (and not master).

0x0

IS_TX_LVL_HI

Tx Level High Status. Indicates that the PHY is operating with high transmit levels (2.4 V), and not low transmit

levels (1.0 V).

0x0

IS_TX_LVL_LO

Tx Level Low Status. Indicates that the PHY is operating with low transmit levels (1.0 V), and not low transmit

levels (2.4 V).

0x0

Vendor Specific 1 MMD Identifier High Register

Device Address: 0x1E; Register Address: 0x0002, Reset: 0x0283, Name: MMD1_DEV_ID1

This address corresponds to the Vendor Specific 1 MMD identifier register specified in Clause 45.2.11.1 of Standard 802.3 and allows 16 bits of

the organizationally unique identifier (OUI) to be observed.

ADIN1100CCPZ-R7 数据表(PDF) 61 Page - Analog Devices

ADIN1100CCPZ-R7 数据表(HTML) 61 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80

数据表下载