数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

M68HC08 数据表(PDF) 41 Page - Freescale Semiconductor, Inc

部件名 M68HC08
功能描述  Microcontrollers
PDF  288 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

M68HC08 数据表(HTML) 41 Page - Freescale Semiconductor, Inc

Back Button M68HC08 Datasheet HTML 37Page - Freescale Semiconductor, Inc M68HC08 Datasheet HTML 38Page - Freescale Semiconductor, Inc M68HC08 Datasheet HTML 39Page - Freescale Semiconductor, Inc M68HC08 Datasheet HTML 40Page - Freescale Semiconductor, Inc M68HC08 Datasheet HTML 41Page - Freescale Semiconductor, Inc M68HC08 Datasheet HTML 42Page - Freescale Semiconductor, Inc M68HC08 Datasheet HTML 43Page - Freescale Semiconductor, Inc M68HC08 Datasheet HTML 44Page - Freescale Semiconductor, Inc M68HC08 Datasheet HTML 45Page - Freescale Semiconductor, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 41 / 288 page
background image
Memory Map
MC68HC908BD48 Rev. 2.1
Data Sheet
Freescale Semiconductor
Memory Map
41
$0014
TIM Channel 1
Register High
(TCH1H)
Read:
Bit15
Bit14
Bit13
Bit12
Bit11
Bit10
Bit9
Bit8
Write:
Reset:
Indeterminate after reset
$0015
TIM Channel 1
Register Low
(TCH1L)
Read:
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Write:
Reset:
Indeterminate after reset
$0016
DDC Master Control
Register (DMCR)
Read:
ALIF
NAKIF
BB
MAST
MRW
BR2
BR1
BR0
Write:
Reset:
00000000
$0017
DDC Address Register
(DADR)
Read:
DAD7
DAD6
DAD5
DAD4
DAD3
DAD2
DAD1
EXTAD
Write:
Reset:
10100000
$0018
DDC Control Register
(DCR)
Read:
DEN
DIEN
00
TXAK
SCLIEN DDC1EN
0
Write:
Reset:
00000000
$0019
DDC Status Register
(DSR)
Read:
RXIF
TXIF
MATCH
SRW
RXAK
SCLIF
TXBE
RXBF
Write:
0
0
0
Reset:
00001010
$001A
DDC
Data Transmit Register
(DDTR)
Read:
DTD7
DTD6
DTD5
DTD4
DTD3
DTD2
DTD1
DTD0
Write:
Reset:
11111111
$001B
DDC
Data Receive Register
(DDRR)
Read:
DRD7
DRD6
DRD5
DRD4
DRD3
DRD2
DRD1
DRD0
Write:
Reset:
00000000
$001C
DDC2 Address Register
(D2ADR)
Read:
D2AD7
D2AD6
D2AD5
D2AD4
D2AD3
D2AD2
D2AD1
0
Write:
Reset:
00000000
$001D
Configuration Register 0
(CONFIG0)
Read:
HSYNCOE VSYNCOE
SOGE
00000
Write:
Reset:
00000000
Addr.
Register Name
Bit 7
654321
Bit 0
= Unimplemented
R
= Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 3 of 12)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com