M68HC08 datasheet(71/288 Pages) FREESCALE

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Central Processor Unit (CPU)

MC68HC908BD48 — Rev. 2.1

Data Sheet

Freescale Semiconductor

Central Processor Unit (CPU)

NOTE:

The location of the stack is arbitrary and may be relocated anywhere in

RAM. Moving the SP out of page 0 ($0000 to $00FF) frees direct

address (page 0) space. For correct operation, the stack pointer must

point only to RAM locations.

6.4.4 Program Counter

The program counter is a 16-bit register that contains the address of the

next instruction or operand to be fetched.

Normally, the program counter automatically increments to the next

sequential memory location every time an instruction or operand is

fetched. Jump, branch, and interrupt operations load the program

counter with an address other than that of the next sequential location.

During reset, the program counter is loaded with the reset vector

address located at $FFFE and $FFFF. The vector address is the

address of the first instruction to be executed after exiting the reset state.

6.4.5 Condition Code Register

The 8-bit condition code register contains the interrupt mask and five

flags that indicate the results of the instruction just executed. Bits 6 and

Bit

987654321

Bit

Read:

Write:

Reset:

0000000011111111

Figure 6-4. Stack Pointer (SP)

Bit

987654321

Bit

Read:

Write:

Reset:

Loaded with Vector from $FFFE and $FFFF

Figure 6-5. Program Counter (PC)

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