PCA9641PW datasheet(20/55 Pages) NXP

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PCA9641

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Product data sheet

Rev. 2.1 — 27 October 2015

20 of 55

NXP Semiconductors

PCA9641

2-channel I2C-bus master arbiter

8.5 Register 4: Interrupt Status register ([B2:B0] = 100b)

These interrupt status bits are sticky and will remain set until cleared by writing ‘1’.

The PCA9641 provides seven different types of interrupt.

Table 12.

INT_STATUS - Interrupt status register (pointer address 04h) bit description

POR = 00h.

Bit

Symbol

Access

Value

Description

Reserved.

BUS_HUNG_INT

R only

Indicates to both masters that SDA signal is LOW

and SCL signal does not toggle for more than

500 ms or SCL is LOW for 500 ms.

No interrupt generated; normal operation.

Interrupt generated; downstream bus cannot

recover; when SDA signal is LOW and SCL signal

does not toggle for more than 500 ms or SCL is

LOW for 500 ms,

MBOX_FULL_INT

R/W

Indicates the mailbox has new mail.

No interrupt generated; mailbox is not full.

Interrupt generated; mailbox full.

MBOX_EMPTY_INT

R/W

Indicates the sent mail is empty, other master has

read the mail.

No interrupt generated; sent mail is not empty.

Interrupt generated; mailbox is empty.

TEST_INT_INT

R/W

Indicates this master has sent an interrupt to itself.

No interrupt generated; master has not set the

TEST_INT bit in STATUS register.

Interrupt generated; master activates its interrupt

pin via the TEST_INT bit in STATUS register.

LOCK_GRANT_INT

R/W

Indicates the master has a lock (ownership) on the

downstream bus.

No interrupt generated; this master does not have

a lock on the downstream bus.

Interrupt generated; this master has a lock on the

downstream bus.

BUS_LOST_INT

R/W

Indicates the master has involuntarily lost the

ownership of the downstream bus.

No interrupt generated; this master is controlling

the downstream bus.

Interrupt generated; this master has involuntarily

lost the control of the downstream bus.

INT_IN_INT

R/W

Indicates that there is an interrupt from the

downstream bus to both the granted and

non-granted masters.

No interrupt on interrupt input pin INT_IN.

Interrupt on interrupt input pin INT_IN.

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