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PCA9641PW 数据表(PDF) 55 Page - NXP Semiconductors |
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PCA9641PW 数据表(HTML) 55 Page - NXP Semiconductors |
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55 / 55 page ![]() NXP Semiconductors PCA9641 2-channel I2C-bus master arbiter © NXP Semiconductors N.V. 2015. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 27 October 2015 Document identifier: PCA9641 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 28. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 2 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 4.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 3 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 7 Functional description . . . . . . . . . . . . . . . . . . . 6 7.1 Device address . . . . . . . . . . . . . . . . . . . . . . . . . 6 7.2 Address maps. . . . . . . . . . . . . . . . . . . . . . . . . . 7 7.3 Command Code . . . . . . . . . . . . . . . . . . . . . . . 10 7.4 Power-on reset . . . . . . . . . . . . . . . . . . . . . . . . 11 7.5 Reset input (RESET) . . . . . . . . . . . . . . . . . . . 11 7.6 Software reset. . . . . . . . . . . . . . . . . . . . . . . . . 11 7.7 Voltage translation . . . . . . . . . . . . . . . . . . . . . 12 8 Register descriptions . . . . . . . . . . . . . . . . . . . 13 8.1 Register 0: ID register ([B2:B0] = 000b) . . . . . 13 8.2 Register 1: Control register ([B2:B0] = 001b) . 13 8.3 Register 2: Status register ([B2:B0] = 010b) . . 16 8.4 Register 3: Reserve Time register ([B2:B0] = 011b) . . . . . . . . . . . . . . . . . . . . . . . 18 8.5 Register 4: Interrupt Status register ([B2:B0] = 100b) . . . . . . . . . . . . . . . . . . . . . . . 20 8.6 Register 5: Interrupt Mask register ([B2:B0] = 101b) . . . . . . . . . . . . . . . . . . . . . . . 21 8.7 Registers 6 and 7: MB registers ([B2:B0] = 110b and 111b) . . . . . . . . . . . . . . . 21 8.8 Operating cycle of the downstream bus . . . . . 22 8.8.1 Request the downstream bus . . . . . . . . . . . . . 22 8.8.2 Acquire the downstream bus . . . . . . . . . . . . . 22 8.8.3 Give up the downstream bus . . . . . . . . . . . . . 22 9 Arbitration . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 9.1 Rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 9.2 Disconnect events . . . . . . . . . . . . . . . . . . . . . 23 10 State machines. . . . . . . . . . . . . . . . . . . . . . . . . 24 11 Request grant examples . . . . . . . . . . . . . . . . . 25 12 Characteristics of the I2C-bus . . . . . . . . . . . . 25 12.1 Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 12.2 START and STOP conditions . . . . . . . . . . . . . 26 12.3 System configuration . . . . . . . . . . . . . . . . . . . 26 12.4 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . 27 12.5 Bus transactions . . . . . . . . . . . . . . . . . . . . . . . 28 12.6 Auto-increment . . . . . . . . . . . . . . . . . . . . . . . . 29 13 General call software reset. . . . . . . . . . . . . . . 30 14 Device ID (PCA9641 ID field) . . . . . . . . . . . . . 31 15 Shared mailbox . . . . . . . . . . . . . . . . . . . . . . . . 32 16 Application design-in information . . . . . . . . . 33 16.1 Specific applications. . . . . . . . . . . . . . . . . . . . 34 16.2 High reliability systems . . . . . . . . . . . . . . . . . 34 16.3 Masters with shared resources . . . . . . . . . . . 35 16.4 Gatekeeper multiplexer . . . . . . . . . . . . . . . . . 36 16.5 Bus initialization/recovery to initialize slaves without hardware reset. . . . . . . . . . . . . . . . . . 37 16.6 Power-on reset requirements. . . . . . . . . . . . . 37 17 Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 39 18 Static characteristics . . . . . . . . . . . . . . . . . . . 40 19 Dynamic characteristics. . . . . . . . . . . . . . . . . 41 20 Test information . . . . . . . . . . . . . . . . . . . . . . . 44 21 Package outline. . . . . . . . . . . . . . . . . . . . . . . . 45 22 Soldering of SMD packages . . . . . . . . . . . . . . 47 22.1 Introduction to soldering. . . . . . . . . . . . . . . . . 47 22.2 Wave and reflow soldering. . . . . . . . . . . . . . . 47 22.3 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . 47 22.4 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . 48 23 Soldering: PCB footprints . . . . . . . . . . . . . . . 50 24 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 52 25 Revision history . . . . . . . . . . . . . . . . . . . . . . . 52 26 Legal information . . . . . . . . . . . . . . . . . . . . . . 53 26.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 53 26.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 26.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 53 26.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 54 27 Contact information . . . . . . . . . . . . . . . . . . . . 54 28 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 |
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