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PCA9641PW 数据表(PDF) 52 Page - NXP Semiconductors |
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PCA9641PW 数据表(HTML) 52 Page - NXP Semiconductors |
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52 / 55 page ![]() PCA9641 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 2.1 — 27 October 2015 52 of 55 NXP Semiconductors PCA9641 2-channel I2C-bus master arbiter 24. Abbreviations 25. Revision history Table 23. Abbreviations Acronym Description AI Auto Increment CDM Charged Device Model DUT Device Under Test EEPROM Electrically Erasable Programmable Read-Only Memory ESD ElectroStatic Discharge FRU Field Replaceable Unit HBM Human Body Model I2C-bus Inter Integrated Circuit bus IC Integrated Circuit POR Power-On Reset RC Resistor-Capacitor network SMBus System Management Bus Table 24. Revision history Document ID Release date Data sheet status Change notice Supersedes PCA9641 v.2.1 20151027 Product data sheet - PCA90641 v.2 Modifications: • Table 20: Corrected tREC;STA from 155 ms to 90 us PCA9641 v.2 20141010 Product data sheet - PCA90641 v.1 • Modifications: • Corrected Figure 1, Figure 2, Figure 3, Figure 21 and Figure 26 PCA9641 v.1 20141008 Product data sheet - - |
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