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PCA9641PW 数据表(PDF) 29 Page - NXP Semiconductors |
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PCA9641PW 数据表(HTML) 29 Page - NXP Semiconductors |
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29 / 55 page  PCA9641 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 2.1 — 27 October 2015 29 of 55 NXP Semiconductors PCA9641 2-channel I2C-bus master arbiter 12.6 Auto-increment Writing to each register carries an overhead of a total of 3 bytes: slave address, command, and data. Auto-increment allows the user to send or receive data continuously where the slave will auto-increment and wrap around on the registers. The auto-increment is bit 8 of the command byte (see Figure 5). By setting the AI bit to 1, the master can send or read N data bytes to or from incrementing addresses that wrap around to 0x0. For example, a write to register address 0x4 will write data byte 1 to address 0x4, data byte 2 to address 0x5 data byte 3 to address 0x6, data byte 4 to address 0x7, data byte 5 to address 0x0, data byte 6 to address 0x1, data byte 7 to address 0x2 and data byte 8 to address 0x3. The read occurs in much the same way. When write to read register only, the write will not affect the value. The master stops an auto-increment write by sending a STOP bit after the final slave ACK. The master stops a read by NACKing the final byte and sending a STOP bit. Remark: If an eighth data byte is read, the first register will be accessed. Refer to Table 15. Fig 17. Read the five registers using the Auto-Increment (AI) bit aaa-008572 A6 A5 A4 A3 A2 A1 A0 0 slave address R/W S START condition A acknowledge from slave 10000 x x x command code register access to register xxx = 000, 001, 010, 011, 100, 101, 110 or 111 auto increment A acknowledge from slave A P STOP condition A no acknowledge from master acknowledge from master Sr re-START condition A6 A5 A4 A3 A2 A1 A0 1 slave address R/W A acknowledge from slave eighth data byte second data byte A acknowledge from master first data byte A acknowledge from master third data byte Table 15. Read/write the registers using Auto-Increment Command code First data byte Second data byte Third data byte Fourth data byte Fifth data byte Sixth data byte Seventh data byte Eighth data byte 1000 0000 ID CONTR STATUS RT INT_ STATUS INT_MASK MB_LO MB_HI 1000 0001 CONTR STATUS RT INT_ STATUS INT_MASK MB_LO MB_HI ID 1000 0010 STATUS RT INT_ STATUS INT_MASK MB_LO MB_HI ID CONTR 1000 0011 RT INT_ STATUS INT_MASK MB_LO MB_HI ID CONTR STATUS 1000 0100 INT_ STATUS INT_MASK MB_LO MB_HI ID CONTR STATUS RT |
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