PM7367 datasheet(30/323 Pages) PMC

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PM7367 FREEDM-32P32

DATA SHEET

PMC-1991499

ISSUE 2

FRAME ENGINE AND DATA LINK MANAGER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE

Pin Name

Type

No.

Function

PAR

I/O

M19

The parity signal (PAR) indicates the parity of

the AD[31:0] and C/BEB[3:0] buses. Even

parity is calculated over all 36 signals in the

buses regardless of whether any or all the bytes

on the AD[31:0] are valid. PAR always reports

the parity of the previous PCICLK cycle. Parity

errors detected by the FREEDM-32P32 are

indicated on output PERRB and in the

FREEDM-32P32 Interrupt Status register.

When the FREEDM-32P32 is the initiator, PAR

is an output for writes and an input for reads.

When the FREEDM-32P32 is the target, PAR is

an input for writes and an output for reads.

When the FREEDM-32P32 is not involved in

the current transaction, PAR is tri-stated.

As an output signal, PAR is updated on the

rising edge of PCICLK. As an input signal, PAR

is sampled on the rising edge of PCICLK.

FRAMEB

I/O

K17

The active low cycle frame signal (FRAMEB)

identifies a transaction cycle. When FRAMEB

transitions low, the start of a bus transaction is

indicated. FRAMEB remains low to define the

duration of the cycle. When FRAMEB

transitions high, the last data phase of the

current transaction is indicated.

When the FREEDM-32P32 is the initiator,

FRAMEB is an output.

When the FREEDM-32P32 is the target,

FRAMEB is an input.

When the FREEDM-32P32 is not involved in

the current transaction, FRAMEB is tri-stated.

As an output signal, FRAMEB is updated on the

rising edge of PCICLK. As an input signal,

FRAMEB is sampled on the rising edge of

PCICLK.

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