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PM7367 数据表(PDF) 104 Page - PMC-Sierra, Inc |
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PM7367 数据表(HTML) 104 Page - PMC-Sierra, Inc |
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104 / 323 page ![]() PM7367 FREEDM-32P32 DATA SHEET PMC-1991499 ISSUE 2 FRAME ENGINE AND DATA LINK MANAGER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE 90 Register 0x00C : FREEDM-32P32 Master Clock / BERT Activity Monitor and Accumulation Trigger Bit Type Function Default Bit 31 to Bit 16 Unused XXXXH Bit 15 Unused X Bit 14 Unused X Bit 13 Unused X Bit 12 Unused X Bit 11 Unused X Bit 10 Unused X Bit 9 Unused X Bit 8 Unused X Bit 7 Unused X Bit 6 Unused X Bit 5 Unused X Bit 4 Unused X Bit 3 Unused X Bit 2 Unused X Bit 1 R TBDA X Bit 0 R SYSCLKA X This register provides activity monitoring on FREEDM-32P32 clock inputs and BERT port input. When a monitored input makes a low to high transition, the corresponding register bit is set high. The bit will remain high until this register is read, at which point, all the bits in this register are cleared. A lack of transitions is indicated by the corresponding register bit reading low. This register should be read periodically to detect for stuck at conditions. Writing to this register delimits the accumulation intervals in the PMON accumulation registers. Counts accumulated in those registers are transferred to holding registers where they can be read. The counters themselves are then |
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