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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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PM7367 数据表(PDF) 190 Page - PMC-Sierra, Inc |
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PM7367 数据表(HTML) 190 Page - PMC-Sierra, Inc |
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190 / 323 page  PM7367 FREEDM-32P32 DATA SHEET PMC-1991499 ISSUE 2 FRAME ENGINE AND DATA LINK MANAGER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE 176 Register 0x300 : TMAC Control Bit Type Function Default Bit 31 to Bit 16 Unused XXXXH Bit 15 Unused X Bit 14 Unused X Bit 13 Unused X Bit 12 Unused X Bit 11 Unused X Bit 10 Unused X Bit 9 Unused X Bit 8 Unused X Bit 7 Unused X Bit 6 R/W TDQ_FRN[1] 0 Bit 5 R/W TDQ_FRN[0] 0 Bit 4 R/W TDQ_RDYN[2] 0 Bit 3 R/W TDQ_RDYN[1] 0 Bit 2 R/W TDQ_RDYN[0] 0 Bit 1 R/W CACHE 1 Bit 0 R/W ENABLE 0 This register provides control of the TMAC block. Note This register is not byte addressable. Writing to this register modifies all the bits in the register. Byte selection using byte enable signals (CBEB[3:0]) are not implemented. However, when all four byte enables are negated, no access is made to this register. ENABLE: The transmit DMA controller enable bit (ENABLE) enables the TMAC to accept TDRs from the TDR Ready Queue and reads packet data from host |
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