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MCP8021 数据表(PDF) 16 Page - Microchip Technology |
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MCP8021 数据表(HTML) 16 Page - Microchip Technology |
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16 / 66 page  MCP8021/2 DS20006265D-page 16 2020-2024 Microchip Technology Inc. and its subsidiaries TABLE 3-2: MCP8022 – PIN FUNCTION TABLE 40-Lead VQFN 38-Lead TSSOP Symbol I/O Description 1 5 DE2 I/O Digital input/output, half-duplex communications, open-drain 2 6 PWMCL I Digital input, Phase C low-side control, pull-down resistor 3 7 PWMCH I Digital input, Phase C high-side control, pull-down resistor 4 8 PWMBL I Digital input, Phase B low-side control, pull-down resistor 5 9 PWMBH I Digital input, Phase B high-side control, pull-down resistor 6 10 PWMAL I Digital input, Phase A low-side control, pull-down resistor 7 11 PWMAH I Digital input, Phase A high-side control, pull-down resistor 8 12 OE I Digital input, device output enable, pull-down resistor 913 FAULT O Digital output, driver Fault, open-drain 10 — PGND Power Power 0V reference 11 14 OUT3 O Operational Amplifier 3 output 12 15 IN3- I Operation Amplifier 3 inverting input 13 16 IN3+ I Operation Amplifier 3 noninverting input 14 17 OUT2 O Operational Amplifier 2 output 15 18 IN2- I Operation Amplifier 2 inverting input 16 19 IN2+ I Operation Amplifier 2 noninverting input 17 20 OUT1 O Operational Amplifier 1 output 18 21 IN1- I Operation Amplifier 1 inverting input 19 22 IN1+ I Operation Amplifier 1 noninverting input 20 23 WAKE I HV digital edge-triggered input, device wake-up from Sleep, pull-down resistor 21 24 PGND Power Power 0V reference 22 25 PHC I/O Phase C high-side MOSFET driver bias reference 23 26 HSC O Phase C high-side N-channel MOSFET gate drive 24 27 VBC Power Phase C high-side MOSFET driver bias 25 28 PHB I/O Phase B high-side MOSFET driver bias reference 26 29 HSB O Phase B high-side N-channel MOSFET gate drive 27 30 VBB Power Phase B high-side MOSFET driver bias 28 31 PHA I/O Phase A high-side MOSFET driver bias reference 29 32 HSA O Phase A high-side N-channel MOSFET gate drive 30 33 VBA Power Phase A high-side MOSFET driver bias —34 PGND Power Power 0V reference 31 35 LSC O Phase C low-side N-channel MOSFET gate drive 32 36 LSB O Phase B low-side N-channel MOSFET gate drive 33 37 LSA O Phase A low-side N-channel MOSFET gate drive 34 38 VBOOT Power Bootstrap and internal low-side gate drive circuit supply output 35 — PGND Power Power 0V reference 36 — PGND Power Power 0V reference 37 1 VREG Power Linear regulator output 38 2 VDD Power Input supply 39 3 CAP2 I/O Charge pump flying capacitor input 40 4 CAP1 I/O Charge pump flying capacitor input(1) EP EP PGND Power Exposed Pad;connect to power 0V reference (PGND) Note 1: 1A Schottky diode between the CAP1 pin and HVSS is recommended to ensure that the CAP1 pin abso- lute minimum voltage specification is maintained. |
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