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VL6624 数据表(PDF) 91 Page - STMicroelectronics

部件名 VL6624
功能描述  1.3 Megapixel single-chip camera module
PDF  106 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

VL6624 数据表(HTML) 91 Page - STMicroelectronics

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VL6624/VS6624
Electrical characteristics
91/106
13.6
I²C slave interface
VL6624/VS6624 contains an I²C-type interface using two signals: a bidirectional serial data
line (SDA) and an input-only serial clock line (SCL). See
Host communication - I²C control
interface for detailed description of protocol.
Figure 33. Voltage level specification
Table 49.
Serial interface voltage levels(1)
Symbol
Parameter
Standard Mode
Fast Mode
Unit
Min.
Max.
Min.
Max.
VHYS
Hysteresis of Schmitt Trigger Inputs
VDD > 2 V
VDD < 2V
N/A
N/A
N/A
N/A
0.05 VDD
0.1 VDD
-
-
V
V
VOL1
VOL3
LOW level output voltage (open drain)
at 3mA sink current
VDD > 2 V
VDD < 2V
0
N/A
0.4
N/A
0
0
0.4
0.2 VDD
V
V
VOH
HIGH level output voltage
N/A
N/A
0.8 VDD
V
tOF
Output fall time from VIHmin to VILmax with
a bus capacitance from 10 pF to 400 pF
-
250
20+0.1Cb
(2)
250
ns
tSP
Pulse width of spikes which must be
suppressed by the input filter
N/A
N/A
0
50
ns
1.
Maximum VIH = VDDmax + 0.5 V
2.
Cb = capacitance of one bus line in pF
VOH
VOL
Input voltage levels
Output voltage levels
VIL
VIH



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