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VL6624 数据表(PDF) 18 Page - STMicroelectronics

部件名 VL6624
功能描述  1.3 Megapixel single-chip camera module
PDF  106 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

VL6624 数据表(HTML) 18 Page - STMicroelectronics

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Frame control
VL6624/VS6624
18/106
6
Frame control
Sensor mode control
The VS6624 device can operate it’s sensor array in three modes controlled by register
SensorMode within
Mode setup.
SensorMode_SXGA - the full array is readout and the max frame rate achievable is
15fps
SensorMode_VGA_analogue binning - the full array operates and a technique of
analogue binning is used to output VGA at up to 30fps
SensorMode_VGA_subsampled - the array is sub-sampled to output VGA at up to
30fps
Image size
An output frame consists of a number of active lines and a number of interframe lines. Each
line consists of embedded line codes (if selected), active pixel data and interline blank data.
Note that by default the interline blanking data is
not qualified by the PCLK and therefore is
not captured by the host system.
The image size can be either the full output from the sensor, depending on sensor mode, or
a scaled output, The output image size can be chosen from one of 7 pre-selected sizes or a
manual image size can be input.
Cropping module
The VL6624/VS6624 contains a cropping module which can be used to define a window of
interest within the full SXGA array size. The user can set a start location and the required
output size.
Figure 4 shows the example with pipe setup bank0.



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