VL6624 datasheet(37/106 Pages) STMICROELECTRONICS

37 / 106 page

VL6624/VS6624

Host communication - I²C control interface

37/106

Master generates a START condition to signal the start of new message.

Master outputs, MS bit first, a 7-bit device address of the slave the master is trying to

communicate with followed by a R/W bit.

R/W = 0 then the master (transmitter) is writing to the slave (receiver).

R/W = 1 the master (receiver) is reading from the slave (transmitter).

The addressed slave acknowledges the device address.

Data transmitted on the bus

When a write is performed then master outputs 8-bits of data on SDA (MS Bit

first).

When a read is performed then slave outputs 8-bits of data on SDA (MS Bit First).

Data receive acknowledge

When a write is performed slave acknowledges data.

When a read is performed master acknowledges data.

Repeat 4 and 5 until all the required data has been written or read.

Minimum number of data bytes for a read =1 (Shortest Message length is 2-bytes).

The master outputs a negative acknowledge for the data when reading the last byte of data.

This causes the slave to stop the output of data and allows the master to generate a STOP

condition.

Master generates a STOP condition or a repeated START.

Figure 21. Device addresses

R/W

Sensor address

Sensor write address 20H

Sensor read address 21H

VL6624 数据表(PDF) 37 Page - STMicroelectronics