ADE7166 datasheet(123/148 Pages) AD

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Preliminary Technical Data

ADE75xx/ADE71xx

Rev. PrE | Page 123 of 148

UART SERIAL INTERFACE

The ADE75XX/ADE71XX UART can be configured in one of

four modes:

- Shift register with baud rate fixed at Fcore/12

- 8-bit UART with variable baud rate

- 9- bit UART with baud rate fixed at Fcore/64 or Fcore/32

- 9 bit UART with variable baud rate

Variable baud rates are defined by using an internal timer to

generate any rate between 300 and 115200 bauds/s.

The UART serial interface provided in the

ADE75XX/ADE71XX is a full-duplex serial interface. It is also

receive buffered, by storing the first received byte in a receive

buffer until the reception of the second byte is complete. The

physical interface to the UART is provided via the RxD (P1.0)

and TxD (P1.1) pins, while the firmware interface is through

the SFRs presented in Table 121.

Both the serial port receive and transmit registers are accessed

through the SBUF SFR (SFR address = 0x99). Writing to SBUF

loads the transmit register, and reading SBUF accesses a

physically separate receive register.

An enhanced UART mode is offered by using UART Timer and

providing enhanced frame error, break error and overwrite

error detection. This mode is enabled by setting the EXTEN bit

in the CFG SFR—see the UART additional features section. The

SBAUDT and SBAUDF SFR are used to configure UART Timer

and to indicate the enhanced UART errors.

UART SFR REGISTER LIST

Table 121. Serial port SFRs

SFR

Address

Bit Addressable

Description

SCON

0x98

Yes

Serial Communications Control register – see Table 122

SBUF

0x99

Serial Port Buffer – see Table 123

SBAUDT

0x9E

Enhanced error checking

– see Table 124

SBAUDF

0x9D

Enhanced Fractional Divider

– see Table 125

Table 122. SCON SFR Bit Description SFR (SCON, 0x98)

Bit

Location

Bit

Addr.

Bit

Name

Default

Value

Description

UART Serial Mode Select Bits. These bits select the serial port operating mode as

follows:

SM0

SM1

Selected Operating Mode.

Mode 0: Shift register, fixed baud rate (Fcore/12).

Mode 1: 8-bit UART, variable baud rate.

Mode 2: 9-bit UART, fixed baud rate (Fcore/32) or (Fcore/16).

7-6

0x9F,

0x9E

SM0,

SM1

Mode 3: 9-bit UART, variable baud rate.

0x9D

SM2

Multiprocessor Communication Enable Bit.

Enables multiprocessor communication in Modes 2 and 3 and framing error detection

in Mode 1.

In Mode 0, SM2 should be cleared.

In Mode 1, if SM2 is set, RI is not activated if a valid stop bit was not received. If SM2 is

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