STLC1502 datasheet(6/81 Pages) STMICROELECTRONICS

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STLC1502

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pxtalout

8.192 MHz crystal feedback

edmiclk

SDRAM feedback clock (input)

8mA

I/O

testarmclk

ARM clock in bypass mode

selarmfreq

Selects ARM PII Vco frequency

rstn

Asynchronous Master Reset Input

188

clkout

25MHz master clock out

4mA

Miscellaneous

bootsel_treqa

Boot selection: Select internal [1]

or external [0] booting ROM. If

proper test configuration has been

selected, then signal assumes Tic

request A functionality

118

hpisel

Select between HPI[1] or

GPIO_KBD IF [0]

Memory I/F (shared signals)

125, 126, 127, 129,

130, 131, 133, 134,

135, 136, 137, 138,

140, 141

add[0..13]

Memory address bus.

For Dynamic RAM, they are the

whole address, whereas for static,

they are the LSBits addresses. At

power up or hardware reset all

address values are 0

4mA

62, 63, 64, 65, 66, 69,

70, 71, 72, 73, 74, 75,

77, 78, 79, 81, 82, 84,

85, 86, 88, 89, 91, 92,

93, 95, 96, 98, 99,

100, 102, 103

data[0..31]

Memory data bus, to exchange

data between memory controller

and external memories

8mA

I/O

2, 3, 4, 5

wenbsn[0..3]

Write byte enable for external

static RAM or byte strobe for

dynamic external RAM

8mA

oen

Output enable for static/dynamic

external RAM. At power up or

hardware reset, the signal will be

asserted if the external booting

(bootsel = ‘1’) has been selected

8mA

ESM (specific controls)

142, 144, 145, 146,

148, 149, 150, 152

add[14..21]

Memory address bus’ MSBits.

They complete the ESM

addressability. A total of 4Mbyte

external (FLASH/SRAM) address

space is addressed by the

STLC1502 device. At the first fetch

of instruction after power_up or

hardware reset, all address values

are ‘0’

4mA

Pin Name

Pin Description/Note

Drive

Type

STLC1502 数据表(PDF) 6 Page - STMicroelectronics

STLC1502 数据表(HTML) 6 Page - STMicroelectronics

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