H8SLASH3021 datasheet(36/712 Pages) RENESAS

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1. Overview

Rev.2.00 Mar. 22, 2007 Page 12 of 684

REJ09B0352-0200

Type

Symbol

Pin No.

I/O

Name and Function

System

control

RES

Input

Reset input: When driven low, this pin

resets the chip

RESO/

FWE

Output/

Input

Reset output (Mask ROM version):

Outputs WDT-generated reset signal to an

external device.

Write enable signal (F-ZTAT version):

Flash memory write control signal.

STBY

Input

Standby: When driven low, this pin forces a

transition to hardware standby mode

Interrupts

NMI

Input

Nonmaskable interrupt: Requests a

nonmaskable interrupt

IRQ

5, IRQ4

IRQ

1, IRQ0

72, 11,

69, 68

Input

Interrupt request 5, 4, 1, 0: Maskable

interrupt request pins

Address bus A

23 to A20,

19 to A8,

7 to A0

77 to 80,

42 to 31,

29 to 22

Output

Address bus: Outputs address signals

Data bus

7 to D0

20 to 13

Input/

output

Data bus: Bidirectional data bus

Bus control

Output

Address strobe: Goes low to indicate valid

address output on the address bus

Output

Read: Goes low to indicate reading from

the external address space.

Output

Write: Goes low to indicate writing to the

external address space indicates valid data

on the data bus.

WAIT

Input

Wait: Requests insertion of wait states in

bus cycles during access to the external

address space

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