H8SLASH3021 datasheet(5/712 Pages) RENESAS

5 / 712 page

Rev.2.00 Mar. 22, 2007 Page v of xxiv

REJ09B0352-0200

Preface

The H8/3022 Group comprises high-performance single-chip microcomputers (MCUs) that

integrate system supporting functions together with an H8/300H CPU core.

The H8/300H CPU has a 32-bit internal architecture with sixteen 16-bit general registers, and a

concise, optimized instruction set designed for speed. It can address a 16-Mbyte linear address

space.

The on-chip system supporting functions include ROM, RAM, a 16-bit integrated timer unit

(ITU), a programmable timing pattern controller (TPC), a watchdog timer (WDT), a serial

communication interface (SCI), an A/D converter, I/O ports, and other facilities. Of the two SCI

channels, one has been expanded to support the ISO/IEC 7816-3 smart card interface. Functions

have also been added to reduce power consumption in battery-powered applications: individual

modules can be placed in standby, and the frequency of the system clock supplied to the chip can

be divided down under software control.

The five MCU operating modes offer a choice of expanded mode, single-chip mode, and address

space size, enabling the H8/3022 Group to adapt quickly and flexibly to a variety of conditions.

In addition to its masked-ROM versions, the H8/3022 Group has an F-ZTAT* version with user

programmable on-chip flash memory that can be programmed on-board. These versions enable

users to respond quickly and flexibly to changing application specifications.

This manual describes the H8/3022 Group hardware. For details of the instruction set, refer to the

H8/300H Series Programming Manual.

Note: * F-ZTAT is a trademark of Renesas Technology Corp.

H8/3021 数据表(PDF) 5 Page - Renesas Technology Corp