H8SLASH3021 datasheet(17/712 Pages) RENESAS

17 / 712 page

Rev.2.00 Mar. 22, 2007 Page xvii of xxiv

REJ09B0352-0200

Section 8 16-Bit Integrated Timer Unit (ITU) ............................................................ 185

8.1

Overview........................................................................................................................... 185

8.1.1

Features ................................................................................................................ 185

8.1.2

Block Diagrams ................................................................................................... 188

8.1.3

Pin Configuration................................................................................................. 193

8.1.4

8.2

Register Descriptions ........................................................................................................ 198

8.2.1

Timer Start Register (TSTR)................................................................................ 198

8.2.2

Timer Synchro Register (TSNC) ......................................................................... 199

8.2.3

Timer Mode Register (TMDR) ............................................................................ 202

8.2.4

Timer Function Control Register (TFCR)............................................................ 205

8.2.5

Timer Output Master Enable Register (TOER) ................................................... 207

8.2.6

Timer Output Control Register (TOCR) .............................................................. 210

8.2.7

Timer Counters (TCNT) ...................................................................................... 211

8.2.8

General Registers (GRA, GRB)........................................................................... 212

8.2.9

Buffer Registers (BRA, BRB) ............................................................................. 213

8.2.10 Timer Control Registers (TCR) ........................................................................... 214

8.2.11 Timer I/O Control Register (TIOR) ..................................................................... 217

8.2.12 Timer Status Register (TSR)................................................................................ 219

8.2.13 Timer Interrupt Enable Register (TIER) .............................................................. 221

8.3

CPU Interface.................................................................................................................... 223

8.3.1

16-Bit Accessible Registers ................................................................................. 223

8.3.2

8-Bit Accessible Registers ................................................................................... 225

8.4

Operation........................................................................................................................... 226

8.4.1

Overview.............................................................................................................. 226

8.4.2

Basic Functions .................................................................................................... 227

8.4.3

Synchronization ................................................................................................... 237

8.4.4

PWM Mode.......................................................................................................... 239

8.4.5

Reset-Synchronized PWM Mode......................................................................... 243

8.4.6

Complementary PWM Mode ............................................................................... 246

8.4.7

Phase Counting Mode .......................................................................................... 256

8.4.8

Buffering.............................................................................................................. 258

8.4.9

ITU Output Timing .............................................................................................. 265

8.5

Interrupts ........................................................................................................................... 267

8.5.1

Setting of Status Flags.......................................................................................... 267

8.5.2

Clearing of Status Flags ....................................................................................... 269

8.5.3

Interrupt Sources.................................................................................................. 270

8.6

Usage Notes ...................................................................................................................... 271

Section 9 Programmable Timing Pattern Controller ................................................. 287

9.1

Overview........................................................................................................................... 287

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